/hal_stm32-3.6.0/stm32cube/stm32l4xx/soc/ |
D | stm32l412xx.h | 7381 #define QUADSPI_SR_TCF_Pos (1U) macro 7382 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32l422xx.h | 7606 #define QUADSPI_SR_TCF_Pos (1U) macro 7607 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32l451xx.h | 12126 #define QUADSPI_SR_TCF_Pos (1U) macro 12127 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32l431xx.h | 11842 #define QUADSPI_SR_TCF_Pos (1U) macro 11843 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32l433xx.h | 12071 #define QUADSPI_SR_TCF_Pos (1U) macro 12072 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32l442xx.h | 11301 #define QUADSPI_SR_TCF_Pos (1U) macro 11302 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32l432xx.h | 11076 #define QUADSPI_SR_TCF_Pos (1U) macro 11077 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32l452xx.h | 12204 #define QUADSPI_SR_TCF_Pos (1U) macro 12205 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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/hal_stm32-3.6.0/stm32cube/stm32wbxx/soc/ |
D | stm32wb35xx.h | 6963 #define QUADSPI_SR_TCF_Pos (1U) macro 6964 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32wb55xx.h | 7154 #define QUADSPI_SR_TCF_Pos (1U) macro 7155 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32wb5mxx.h | 7154 #define QUADSPI_SR_TCF_Pos (1U) macro 7155 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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/hal_stm32-3.6.0/stm32cube/stm32g4xx/soc/ |
D | stm32g4a1xx.h | 7679 #define QUADSPI_SR_TCF_Pos (1U) macro 7680 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32g491xx.h | 7458 #define QUADSPI_SR_TCF_Pos (1U) macro 7459 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32g473xx.h | 8121 #define QUADSPI_SR_TCF_Pos (1U) macro 8122 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32g471xx.h | 7607 #define QUADSPI_SR_TCF_Pos (1U) macro 7608 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32g483xx.h | 8342 #define QUADSPI_SR_TCF_Pos (1U) macro 8343 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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/hal_stm32-3.6.0/stm32cube/stm32f4xx/soc/ |
D | stm32f412zx.h | 9075 #define QUADSPI_SR_TCF_Pos (1U) macro 9076 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32f413xx.h | 9309 #define QUADSPI_SR_TCF_Pos (1U) macro 9310 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32f412vx.h | 9071 #define QUADSPI_SR_TCF_Pos (1U) macro 9072 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32f423xx.h | 9345 #define QUADSPI_SR_TCF_Pos (1U) macro 9346 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32f412rx.h | 9069 #define QUADSPI_SR_TCF_Pos (1U) macro 9070 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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/hal_stm32-3.6.0/stm32cube/stm32f7xx/soc/ |
D | stm32f722xx.h | 8949 #define QUADSPI_SR_TCF_Pos (1U) macro 8950 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32f723xx.h | 8965 #define QUADSPI_SR_TCF_Pos (1U) macro 8966 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32f733xx.h | 9179 #define QUADSPI_SR_TCF_Pos (1U) macro 9180 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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D | stm32f730xx.h | 9179 #define QUADSPI_SR_TCF_Pos (1U) macro 9180 #define QUADSPI_SR_TCF_Msk (0x1UL << QUADSPI_SR_TCF_Pos) /*!< 0x00000002 */
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