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Searched refs:BreakState (Results 1 – 25 of 72) sorted by relevance

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/hal_stm32-3.6.0/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_ll_tim.c650 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; in LL_TIM_BDTR_StructInit()
678 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); in LL_TIM_BDTR_Init()
690 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
Dstm32f0xx_hal_tim_ex.c2039 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); in HAL_TIMEx_ConfigBreakDeadTime()
2054 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
/hal_stm32-3.6.0/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_ll_tim.c671 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; in LL_TIM_BDTR_StructInit()
699 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); in LL_TIM_BDTR_Init()
711 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
Dstm32f4xx_hal_tim_ex.c2035 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); in HAL_TIMEx_ConfigBreakDeadTime()
2050 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
/hal_stm32-3.6.0/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_ll_tim.c671 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; in LL_TIM_BDTR_StructInit()
699 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); in LL_TIM_BDTR_Init()
711 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
Dstm32f2xx_hal_tim_ex.c2038 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); in HAL_TIMEx_ConfigBreakDeadTime()
2053 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
/hal_stm32-3.6.0/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_ll_tim.c689 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; in LL_TIM_BDTR_StructInit()
717 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); in LL_TIM_BDTR_Init()
729 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
Dstm32f1xx_hal_tim_ex.c2038 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); in HAL_TIMEx_ConfigBreakDeadTime()
2053 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
/hal_stm32-3.6.0/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_ll_tim.c657 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; in LL_TIM_BDTR_StructInit()
694 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); in LL_TIM_BDTR_Init()
706 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
/hal_stm32-3.6.0/stm32cube/stm32c0xx/drivers/src/
Dstm32c0xx_ll_tim.c669 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; in LL_TIM_BDTR_StructInit()
706 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); in LL_TIM_BDTR_Init()
718 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
/hal_stm32-3.6.0/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_ll_tim.c674 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; in LL_TIM_BDTR_StructInit()
711 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); in LL_TIM_BDTR_Init()
725 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
/hal_stm32-3.6.0/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_ll_tim.c698 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; in LL_TIM_BDTR_StructInit()
733 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); in LL_TIM_BDTR_Init()
745 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
Dstm32l4xx_hal_tim_ex.c2053 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); in HAL_TIMEx_ConfigBreakDeadTime()
2069 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
/hal_stm32-3.6.0/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_ll_tim.c725 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; in LL_TIM_BDTR_StructInit()
760 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); in LL_TIM_BDTR_Init()
772 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
Dstm32f7xx_hal_tim_ex.c2052 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); in HAL_TIMEx_ConfigBreakDeadTime()
2068 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
/hal_stm32-3.6.0/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_ll_tim.c692 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; in LL_TIM_BDTR_StructInit()
729 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); in LL_TIM_BDTR_Init()
741 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
/hal_stm32-3.6.0/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_ll_tim.c701 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; in LL_TIM_BDTR_StructInit()
738 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); in LL_TIM_BDTR_Init()
750 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
/hal_stm32-3.6.0/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_ll_tim.c661 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; in LL_TIM_BDTR_StructInit()
698 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); in LL_TIM_BDTR_Init()
712 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
/hal_stm32-3.6.0/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_ll_tim.c725 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; in LL_TIM_BDTR_StructInit()
761 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); in LL_TIM_BDTR_Init()
773 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
Dstm32mp1xx_hal_tim_ex.c1725 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); in HAL_TIMEx_ConfigBreakDeadTime()
1741 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
/hal_stm32-3.6.0/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_ll_tim.c737 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; in LL_TIM_BDTR_StructInit()
778 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); in LL_TIM_BDTR_Init()
790 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
/hal_stm32-3.6.0/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_ll_tim.c709 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; in LL_TIM_BDTR_StructInit()
746 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); in LL_TIM_BDTR_Init()
758 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
/hal_stm32-3.6.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_ll_tim.c746 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; in LL_TIM_BDTR_StructInit()
783 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); in LL_TIM_BDTR_Init()
795 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
/hal_stm32-3.6.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_ll_tim.c711 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; in LL_TIM_BDTR_StructInit()
748 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); in LL_TIM_BDTR_Init()
760 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
/hal_stm32-3.6.0/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_ll_tim.c774 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; in LL_TIM_BDTR_StructInit()
813 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); in LL_TIM_BDTR_Init()
825 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()

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