/hal_stm32-3.5.0/stm32cube/stm32mp1xx/drivers/src/ |
D | stm32mp1xx_ll_fmc.c | 337 uint32_t tmpr; in FMC_NORSRAM_Timing_Init() local 364 …tmpr = (uint32_t)(Device->BTCR[FMC_NORSRAM_BANK1 + 1U] & ~(((uint32_t)0x0F) << FMC_BTR1_CLKDIV_Pos… in FMC_NORSRAM_Timing_Init() 365 tmpr |= (uint32_t)(((Timing->CLKDivision) - 1U) << FMC_BTR1_CLKDIV_Pos); in FMC_NORSRAM_Timing_Init() 366 MODIFY_REG(Device->BTCR[FMC_NORSRAM_BANK1 + 1U], FMC_BTR1_CLKDIV, tmpr); in FMC_NORSRAM_Timing_Init()
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/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/src/ |
D | stm32u5xx_ll_fmc.c | 364 uint32_t tmpr; in FMC_NORSRAM_Timing_Init() local 391 tmpr = (uint32_t)(Device->BTCR[FMC_NORSRAM_BANK1 + 1U] & ~((0x0FU) << FMC_BTRx_CLKDIV_Pos)); in FMC_NORSRAM_Timing_Init() 392 tmpr |= (uint32_t)(((Timing->CLKDivision) - 1U) << FMC_BTRx_CLKDIV_Pos); in FMC_NORSRAM_Timing_Init() 393 MODIFY_REG(Device->BTCR[FMC_NORSRAM_BANK1 + 1U], FMC_BTRx_CLKDIV, tmpr); in FMC_NORSRAM_Timing_Init()
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/hal_stm32-3.5.0/stm32cube/stm32g4xx/drivers/src/ |
D | stm32g4xx_ll_fmc.c | 368 uint32_t tmpr; in FMC_NORSRAM_Timing_Init() local 395 tmpr = (uint32_t)(Device->BTCR[FMC_NORSRAM_BANK1 + 1U] & ~((0x0FU) << FMC_BTRx_CLKDIV_Pos)); in FMC_NORSRAM_Timing_Init() 396 tmpr |= (uint32_t)(((Timing->CLKDivision) - 1U) << FMC_BTRx_CLKDIV_Pos); in FMC_NORSRAM_Timing_Init() 397 MODIFY_REG(Device->BTCR[FMC_NORSRAM_BANK1 + 1U], FMC_BTRx_CLKDIV, tmpr); in FMC_NORSRAM_Timing_Init()
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/hal_stm32-3.5.0/stm32cube/stm32l5xx/drivers/src/ |
D | stm32l5xx_ll_fmc.c | 363 uint32_t tmpr; in FMC_NORSRAM_Timing_Init() local 390 tmpr = (uint32_t)(Device->BTCR[FMC_NORSRAM_BANK1 + 1U] & ~((0x0FU) << FMC_BTRx_CLKDIV_Pos)); in FMC_NORSRAM_Timing_Init() 391 tmpr |= (uint32_t)(((Timing->CLKDivision) - 1U) << FMC_BTRx_CLKDIV_Pos); in FMC_NORSRAM_Timing_Init() 392 MODIFY_REG(Device->BTCR[FMC_NORSRAM_BANK1 + 1U], FMC_BTRx_CLKDIV, tmpr); in FMC_NORSRAM_Timing_Init()
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/hal_stm32-3.5.0/stm32cube/stm32l4xx/drivers/src/ |
D | stm32l4xx_ll_fmc.c | 401 uint32_t tmpr; in FMC_NORSRAM_Timing_Init() local 440 tmpr = (uint32_t)(Device->BTCR[FMC_NORSRAM_BANK1 + 1U] & ~((0x0FU) << FMC_BTRx_CLKDIV_Pos)); in FMC_NORSRAM_Timing_Init() 441 tmpr |= (uint32_t)(((Timing->CLKDivision) - 1U) << FMC_BTRx_CLKDIV_Pos); in FMC_NORSRAM_Timing_Init() 442 MODIFY_REG(Device->BTCR[FMC_NORSRAM_BANK1 + 1U], FMC_BTRx_CLKDIV, tmpr); in FMC_NORSRAM_Timing_Init()
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/hal_stm32-3.5.0/stm32cube/stm32f3xx/drivers/src/ |
D | stm32f3xx_ll_fmc.c | 328 uint32_t tmpr; in FMC_NORSRAM_Timing_Init() local 353 tmpr = (uint32_t)(Device->BTCR[FMC_NORSRAM_BANK1 + 1U] & ~((0x0FU) << FMC_BTRx_CLKDIV_Pos)); in FMC_NORSRAM_Timing_Init() 354 tmpr |= (uint32_t)(((Timing->CLKDivision) - 1U) << FMC_BTRx_CLKDIV_Pos); in FMC_NORSRAM_Timing_Init() 355 MODIFY_REG(Device->BTCR[FMC_NORSRAM_BANK1 + 1U], FMC_BTRx_CLKDIV, tmpr); in FMC_NORSRAM_Timing_Init()
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/hal_stm32-3.5.0/stm32cube/stm32f4xx/drivers/src/ |
D | stm32f4xx_ll_fsmc.c | 382 uint32_t tmpr; in FSMC_NORSRAM_Timing_Init() local 409 tmpr = (uint32_t)(Device->BTCR[FSMC_NORSRAM_BANK1 + 1U] & ~((0x0FU) << FSMC_BTR1_CLKDIV_Pos)); in FSMC_NORSRAM_Timing_Init() 410 tmpr |= (uint32_t)(((Timing->CLKDivision) - 1U) << FSMC_BTR1_CLKDIV_Pos); in FSMC_NORSRAM_Timing_Init() 411 MODIFY_REG(Device->BTCR[FSMC_NORSRAM_BANK1 + 1U], FSMC_BTR1_CLKDIV, tmpr); in FSMC_NORSRAM_Timing_Init()
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D | stm32f4xx_ll_fmc.c | 401 uint32_t tmpr; in FMC_NORSRAM_Timing_Init() local 428 tmpr = (uint32_t)(Device->BTCR[FMC_NORSRAM_BANK1 + 1U] & ~((0x0FU) << FMC_BTR1_CLKDIV_Pos)); in FMC_NORSRAM_Timing_Init() 429 tmpr |= (uint32_t)(((Timing->CLKDivision) - 1U) << FMC_BTR1_CLKDIV_Pos); in FMC_NORSRAM_Timing_Init() 430 MODIFY_REG(Device->BTCR[FMC_NORSRAM_BANK1 + 1U], FMC_BTR1_CLKDIV, tmpr); in FMC_NORSRAM_Timing_Init()
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/hal_stm32-3.5.0/stm32cube/stm32f7xx/drivers/src/ |
D | stm32f7xx_ll_fmc.c | 326 uint32_t tmpr; in FMC_NORSRAM_Timing_Init() local 351 tmpr = (uint32_t)(Device->BTCR[FMC_NORSRAM_BANK1 + 1U] & ~((0x0FU) << FMC_BTR1_CLKDIV_Pos)); in FMC_NORSRAM_Timing_Init() 352 tmpr |= (uint32_t)(((Timing->CLKDivision) - 1U) << FMC_BTR1_CLKDIV_Pos); in FMC_NORSRAM_Timing_Init() 353 MODIFY_REG(Device->BTCR[FMC_NORSRAM_BANK1 + 1U], FMC_BTR1_CLKDIV, tmpr); in FMC_NORSRAM_Timing_Init()
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/hal_stm32-3.5.0/stm32cube/stm32h7xx/drivers/src/ |
D | stm32h7xx_ll_fmc.c | 326 uint32_t tmpr; in FMC_NORSRAM_Timing_Init() local 351 tmpr = (uint32_t)(Device->BTCR[FMC_NORSRAM_BANK1 + 1U] & ~((0x0FU) << FMC_BTRx_CLKDIV_Pos)); in FMC_NORSRAM_Timing_Init() 352 tmpr |= (uint32_t)(((Timing->CLKDivision) - 1U) << FMC_BTRx_CLKDIV_Pos); in FMC_NORSRAM_Timing_Init() 353 MODIFY_REG(Device->BTCR[FMC_NORSRAM_BANK1 + 1U], FMC_BTRx_CLKDIV, tmpr); in FMC_NORSRAM_Timing_Init()
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/hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/src/ |
D | stm32h5xx_ll_fmc.c | 381 uint32_t tmpr; in FMC_NORSRAM_Timing_Init() local 408 tmpr = (uint32_t)(Device->BTCR[FMC_NORSRAM_BANK1 + 1U] & ~((0x0FU) << FMC_BTRx_CLKDIV_Pos)); in FMC_NORSRAM_Timing_Init() 409 tmpr |= (uint32_t)(((Timing->CLKDivision) - 1U) << FMC_BTRx_CLKDIV_Pos); in FMC_NORSRAM_Timing_Init() 410 MODIFY_REG(Device->BTCR[FMC_NORSRAM_BANK1 + 1U], FMC_BTRx_CLKDIV, tmpr); in FMC_NORSRAM_Timing_Init()
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