/hal_stm32-3.5.0/stm32cube/stm32l1xx/drivers/src/ |
D | stm32l1xx_hal_flash_ex.c | 644 uint32_t tmp2 = 0U; in HAL_FLASHEx_OB_SelectPCROP() local 658 tmp2 = (uint32_t)(((uint32_t)((uint32_t)(tmp1) << 16U)) | ((uint32_t)optiontmp2)); in HAL_FLASHEx_OB_SelectPCROP() 666 OB->RDP = tmp2; in HAL_FLASHEx_OB_SelectPCROP() 687 uint32_t tmp2 = 0U; in HAL_FLASHEx_OB_DeSelectPCROP() local 701 tmp2 = (uint32_t)(((uint32_t)((uint32_t)(tmp1) << 16U)) | ((uint32_t)optiontmp2)); in HAL_FLASHEx_OB_DeSelectPCROP() 709 OB->RDP = tmp2; in HAL_FLASHEx_OB_DeSelectPCROP() 959 uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U; in FLASH_OB_RDPConfig() local 985 tmp2 = (uint32_t)(((uint32_t)((uint32_t)(tmp1) << 16U)) | ((uint32_t)(OB_RDP | tmp3))); in FLASH_OB_RDPConfig() 996 OB->RDP = tmp2; in FLASH_OB_RDPConfig() 1239 uint32_t tmp1 = 0U, tmp2 = 0U; in FLASH_OB_WRPConfigWRP1OrPCROP1() local [all …]
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D | stm32l1xx_hal_smbus.c | 1406 uint32_t tickstart = 0U, tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, SMBUS_Trials = 1U; in HAL_SMBUS_IsDeviceReady() local 1455 tmp2 = __HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF); in HAL_SMBUS_IsDeviceReady() 1457 while ((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_SMBUS_STATE_TIMEOUT)) in HAL_SMBUS_IsDeviceReady() 1464 tmp2 = __HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF); in HAL_SMBUS_IsDeviceReady() 1635 uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, tmp4 = 0U; in HAL_SMBUS_ER_IRQHandler() local 1671 tmp2 = hsmbus->XferCount; in HAL_SMBUS_ER_IRQHandler() 1675 if ((tmp1 == HAL_SMBUS_MODE_SLAVE) && (tmp2 == 0U) && \ in HAL_SMBUS_ER_IRQHandler()
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/hal_stm32-3.5.0/stm32cube/stm32f1xx/drivers/src/Legacy/ |
D | stm32f1xx_hal_can.c | 1235 uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U; in HAL_CAN_IRQHandler() local 1240 tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FOV0); in HAL_CAN_IRQHandler() 1241 if((tmp1 != 0U) && tmp2) in HAL_CAN_IRQHandler() 1252 tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FOV1); in HAL_CAN_IRQHandler() 1253 if((tmp1 != 0U) && tmp2) in HAL_CAN_IRQHandler() 1267 tmp2 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_1); in HAL_CAN_IRQHandler() 1269 if(tmp1 || tmp2 || tmp3) in HAL_CAN_IRQHandler() 1272 tmp2 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK1); in HAL_CAN_IRQHandler() 1275 if((tmp1) || (tmp2) || (tmp3)) in HAL_CAN_IRQHandler() 1293 tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP0); in HAL_CAN_IRQHandler() [all …]
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/hal_stm32-3.5.0/stm32cube/stm32f7xx/drivers/src/Legacy/ |
D | stm32f7xx_hal_can.c | 1225 uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U; in HAL_CAN_IRQHandler() local 1230 tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FOV0); in HAL_CAN_IRQHandler() 1231 if(tmp1 && tmp2) in HAL_CAN_IRQHandler() 1241 tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FOV1); in HAL_CAN_IRQHandler() 1243 if(tmp1 && tmp2) in HAL_CAN_IRQHandler() 1256 tmp2 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_1); in HAL_CAN_IRQHandler() 1258 if(tmp1 || tmp2 || tmp3) in HAL_CAN_IRQHandler() 1261 tmp2 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK1); in HAL_CAN_IRQHandler() 1264 if(tmp1 || tmp2 || tmp3) in HAL_CAN_IRQHandler() 1282 tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP0); in HAL_CAN_IRQHandler() [all …]
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/hal_stm32-3.5.0/stm32cube/stm32f2xx/drivers/src/Legacy/ |
D | stm32f2xx_hal_can.c | 1194 uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U; in HAL_CAN_IRQHandler() local 1199 tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FOV0); in HAL_CAN_IRQHandler() 1200 if(tmp1 && tmp2) in HAL_CAN_IRQHandler() 1210 tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FOV1); in HAL_CAN_IRQHandler() 1212 if(tmp1 && tmp2) in HAL_CAN_IRQHandler() 1225 tmp2 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_1); in HAL_CAN_IRQHandler() 1227 if(tmp1 || tmp2 || tmp3) in HAL_CAN_IRQHandler() 1230 tmp2 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK1); in HAL_CAN_IRQHandler() 1233 if(tmp1 || tmp2 || tmp3) in HAL_CAN_IRQHandler() 1251 tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP0); in HAL_CAN_IRQHandler() [all …]
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/hal_stm32-3.5.0/stm32cube/stm32f4xx/drivers/src/Legacy/ |
D | stm32f4xx_hal_can.c | 1221 uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U; in HAL_CAN_IRQHandler() local 1226 tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FOV0); in HAL_CAN_IRQHandler() 1227 if(tmp1 && tmp2) in HAL_CAN_IRQHandler() 1237 tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FOV1); in HAL_CAN_IRQHandler() 1239 if(tmp1 && tmp2) in HAL_CAN_IRQHandler() 1252 tmp2 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_1); in HAL_CAN_IRQHandler() 1254 if(tmp1 || tmp2 || tmp3) in HAL_CAN_IRQHandler() 1257 tmp2 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK1); in HAL_CAN_IRQHandler() 1260 if(tmp1 || tmp2 || tmp3) in HAL_CAN_IRQHandler() 1278 tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP0); in HAL_CAN_IRQHandler() [all …]
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/hal_stm32-3.5.0/stm32cube/stm32f7xx/drivers/src/ |
D | stm32f7xx_hal_adc_ex.c | 150 uint32_t tmp1 = 0, tmp2 = 0; in HAL_ADCEx_InjectedStart() local 206 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); in HAL_ADCEx_InjectedStart() 207 if(tmp1 && tmp2) in HAL_ADCEx_InjectedStart() 216 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); in HAL_ADCEx_InjectedStart() 217 if((hadc->Instance == ADC1) && tmp1 && tmp2) in HAL_ADCEx_InjectedStart() 247 uint32_t tmp1 = 0, tmp2 = 0; in HAL_ADCEx_InjectedStart_IT() local 306 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); in HAL_ADCEx_InjectedStart_IT() 307 if(tmp1 && tmp2) in HAL_ADCEx_InjectedStart_IT() 316 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); in HAL_ADCEx_InjectedStart_IT() 317 if((hadc->Instance == ADC1) && tmp1 && tmp2) in HAL_ADCEx_InjectedStart_IT()
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D | stm32f7xx_hal_dma2d.c | 2074 uint32_t tmp2; in DMA2D_SetConfig() local 2088 tmp2 = pdata & DMA2D_OCOLR_RED_1; in DMA2D_SetConfig() 2095 tmp = (tmp3 | tmp2 | tmp1 | tmp4); in DMA2D_SetConfig() 2099 tmp = (tmp3 | tmp2 | tmp4); in DMA2D_SetConfig() 2103 tmp2 = (tmp2 >> 19U); in DMA2D_SetConfig() 2106 tmp = ((tmp3 << 5U) | (tmp2 << 11U) | tmp4); in DMA2D_SetConfig() 2111 tmp2 = (tmp2 >> 19U); in DMA2D_SetConfig() 2114 tmp = ((tmp3 << 5U) | (tmp2 << 10U) | (tmp1 << 15U) | tmp4); in DMA2D_SetConfig() 2119 tmp2 = (tmp2 >> 20U); in DMA2D_SetConfig() 2122 tmp = ((tmp3 << 4U) | (tmp2 << 8U) | (tmp1 << 12U) | tmp4); in DMA2D_SetConfig()
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D | stm32f7xx_hal_adc.c | 1211 uint32_t tmp1 = 0, tmp2 = 0; in HAL_ADC_IRQHandler() local 1222 tmp2 = tmp_cr1 & ADC_IT_EOC; in HAL_ADC_IRQHandler() 1225 if(tmp1 && tmp2) in HAL_ADC_IRQHandler() 1272 tmp2 = tmp_cr1 & ADC_IT_JEOC; in HAL_ADC_IRQHandler() 1274 if(tmp1 && tmp2) in HAL_ADC_IRQHandler() 1318 tmp2 = tmp_cr1 & ADC_IT_AWD; in HAL_ADC_IRQHandler() 1320 if(tmp1 && tmp2) in HAL_ADC_IRQHandler() 1341 tmp2 = tmp_cr1 & ADC_IT_OVR; in HAL_ADC_IRQHandler() 1343 if(tmp1 && tmp2) in HAL_ADC_IRQHandler()
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/hal_stm32-3.5.0/stm32cube/stm32f2xx/drivers/src/ |
D | stm32f2xx_hal_adc_ex.c | 151 uint32_t tmp1 = 0U, tmp2 = 0U; in HAL_ADCEx_InjectedStart() local 207 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); in HAL_ADCEx_InjectedStart() 208 if(tmp1 && tmp2) in HAL_ADCEx_InjectedStart() 217 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); in HAL_ADCEx_InjectedStart() 218 if((hadc->Instance == ADC1) && tmp1 && tmp2) in HAL_ADCEx_InjectedStart() 248 uint32_t tmp1 = 0U, tmp2 = 0U; in HAL_ADCEx_InjectedStart_IT() local 307 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); in HAL_ADCEx_InjectedStart_IT() 308 if(tmp1 && tmp2) in HAL_ADCEx_InjectedStart_IT() 317 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); in HAL_ADCEx_InjectedStart_IT() 318 if((hadc->Instance == ADC1) && tmp1 && tmp2) in HAL_ADCEx_InjectedStart_IT()
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D | stm32f2xx_hal_adc.c | 1168 uint32_t tmp1 = 0U, tmp2 = 0U; in HAL_ADC_IRQHandler() local 1179 tmp2 = tmp_cr1 & ADC_IT_EOC; in HAL_ADC_IRQHandler() 1181 if(tmp1 && tmp2) in HAL_ADC_IRQHandler() 1228 tmp2 = tmp_cr1 & ADC_IT_JEOC; in HAL_ADC_IRQHandler() 1230 if(tmp1 && tmp2) in HAL_ADC_IRQHandler() 1274 tmp2 = tmp_cr1 & ADC_IT_AWD; in HAL_ADC_IRQHandler() 1276 if(tmp1 && tmp2) in HAL_ADC_IRQHandler() 1296 tmp2 = tmp_cr1 & ADC_IT_OVR; in HAL_ADC_IRQHandler() 1298 if(tmp1 && tmp2) in HAL_ADC_IRQHandler()
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/hal_stm32-3.5.0/stm32cube/stm32f4xx/drivers/src/ |
D | stm32f4xx_hal_adc_ex.c | 149 uint32_t tmp1 = 0U, tmp2 = 0U; in HAL_ADCEx_InjectedStart() local 211 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); in HAL_ADCEx_InjectedStart() 212 if(tmp1 && tmp2) in HAL_ADCEx_InjectedStart() 221 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); in HAL_ADCEx_InjectedStart() 222 if((hadc->Instance == ADC1) && tmp1 && tmp2) in HAL_ADCEx_InjectedStart() 252 uint32_t tmp1 = 0U, tmp2 = 0U; in HAL_ADCEx_InjectedStart_IT() local 317 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); in HAL_ADCEx_InjectedStart_IT() 318 if(tmp1 && tmp2) in HAL_ADCEx_InjectedStart_IT() 327 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); in HAL_ADCEx_InjectedStart_IT() 328 if((hadc->Instance == ADC1) && tmp1 && tmp2) in HAL_ADCEx_InjectedStart_IT()
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D | stm32f4xx_hal_dma2d.c | 2054 uint32_t tmp2; in DMA2D_SetConfig() local 2068 tmp2 = pdata & DMA2D_OCOLR_RED_1; in DMA2D_SetConfig() 2075 tmp = (tmp3 | tmp2 | tmp1 | tmp4); in DMA2D_SetConfig() 2079 tmp = (tmp3 | tmp2 | tmp4); in DMA2D_SetConfig() 2083 tmp2 = (tmp2 >> 19U); in DMA2D_SetConfig() 2086 tmp = ((tmp3 << 5U) | (tmp2 << 11U) | tmp4); in DMA2D_SetConfig() 2091 tmp2 = (tmp2 >> 19U); in DMA2D_SetConfig() 2094 tmp = ((tmp3 << 5U) | (tmp2 << 10U) | (tmp1 << 15U) | tmp4); in DMA2D_SetConfig() 2099 tmp2 = (tmp2 >> 20U); in DMA2D_SetConfig() 2102 tmp = ((tmp3 << 4U) | (tmp2 << 8U) | (tmp1 << 12U) | tmp4); in DMA2D_SetConfig()
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D | stm32f4xx_hal_adc.c | 1201 uint32_t tmp1 = 0U, tmp2 = 0U; in HAL_ADC_IRQHandler() local 1212 tmp2 = tmp_cr1 & ADC_IT_EOC; in HAL_ADC_IRQHandler() 1214 if(tmp1 && tmp2) in HAL_ADC_IRQHandler() 1261 tmp2 = tmp_cr1 & ADC_IT_JEOC; in HAL_ADC_IRQHandler() 1263 if(tmp1 && tmp2) in HAL_ADC_IRQHandler() 1308 tmp2 = tmp_cr1 & ADC_IT_AWD; in HAL_ADC_IRQHandler() 1310 if(tmp1 && tmp2) in HAL_ADC_IRQHandler() 1330 tmp2 = tmp_cr1 & ADC_IT_OVR; in HAL_ADC_IRQHandler() 1332 if(tmp1 && tmp2) in HAL_ADC_IRQHandler()
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D | stm32f4xx_hal_smbus.c | 1394 uint32_t tickstart = 0U, tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, SMBUS_Trials = 1U; in HAL_SMBUS_IsDeviceReady() local 1443 tmp2 = __HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF); in HAL_SMBUS_IsDeviceReady() 1445 while ((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_SMBUS_STATE_TIMEOUT)) in HAL_SMBUS_IsDeviceReady() 1452 tmp2 = __HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF); in HAL_SMBUS_IsDeviceReady() 1623 uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, tmp4 = 0U; in HAL_SMBUS_ER_IRQHandler() local 1659 tmp2 = hsmbus->XferCount; in HAL_SMBUS_ER_IRQHandler() 1663 if ((tmp1 == HAL_SMBUS_MODE_SLAVE) && (tmp2 == 0U) && \ in HAL_SMBUS_ER_IRQHandler()
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D | stm32f4xx_ll_dma2d.c | 165 uint32_t tmp2; in LL_DMA2D_Init() local 184 tmp2 = LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2Dx); in LL_DMA2D_Init() 185 if ((tmp == 0U) && (tmp1 == 0U) && (tmp2 == 0U)) in LL_DMA2D_Init()
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/hal_stm32-3.5.0/stm32cube/stm32h7xx/drivers/src/ |
D | stm32h7xx_hal_dma2d.c | 2109 uint32_t tmp2; in DMA2D_SetConfig() local 2123 tmp2 = pdata & DMA2D_OCOLR_RED_1; in DMA2D_SetConfig() 2130 tmp = (tmp3 | tmp2 | tmp1 | tmp4); in DMA2D_SetConfig() 2134 tmp = (tmp3 | tmp2 | tmp4); in DMA2D_SetConfig() 2138 tmp2 = (tmp2 >> 19U); in DMA2D_SetConfig() 2141 tmp = ((tmp3 << 5U) | (tmp2 << 11U) | tmp4); in DMA2D_SetConfig() 2146 tmp2 = (tmp2 >> 19U); in DMA2D_SetConfig() 2149 tmp = ((tmp3 << 5U) | (tmp2 << 10U) | (tmp1 << 15U) | tmp4); in DMA2D_SetConfig() 2154 tmp2 = (tmp2 >> 20U); in DMA2D_SetConfig() 2157 tmp = ((tmp3 << 4U) | (tmp2 << 8U) | (tmp1 << 12U) | tmp4); in DMA2D_SetConfig()
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/hal_stm32-3.5.0/stm32cube/stm32l4xx/drivers/src/ |
D | stm32l4xx_hal_dma2d.c | 2129 uint32_t tmp2; in DMA2D_SetConfig() local 2143 tmp2 = pdata & DMA2D_OCOLR_RED_1; in DMA2D_SetConfig() 2150 tmp = (tmp3 | tmp2 | tmp1 | tmp4); in DMA2D_SetConfig() 2154 tmp = (tmp3 | tmp2 | tmp4); in DMA2D_SetConfig() 2158 tmp2 = (tmp2 >> 19U); in DMA2D_SetConfig() 2161 tmp = ((tmp3 << 5U) | (tmp2 << 11U) | tmp4); in DMA2D_SetConfig() 2166 tmp2 = (tmp2 >> 19U); in DMA2D_SetConfig() 2169 tmp = ((tmp3 << 5U) | (tmp2 << 10U) | (tmp1 << 15U) | tmp4); in DMA2D_SetConfig() 2174 tmp2 = (tmp2 >> 20U); in DMA2D_SetConfig() 2177 tmp = ((tmp3 << 4U) | (tmp2 << 8U) | (tmp1 << 12U) | tmp4); in DMA2D_SetConfig()
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/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/src/ |
D | stm32u5xx_hal_dma2d.c | 2113 uint32_t tmp2; in DMA2D_SetConfig() local 2127 tmp2 = pdata & DMA2D_OCOLR_RED_1; in DMA2D_SetConfig() 2134 tmp = (tmp3 | tmp2 | tmp1 | tmp4); in DMA2D_SetConfig() 2138 tmp = (tmp3 | tmp2 | tmp4); in DMA2D_SetConfig() 2142 tmp2 = (tmp2 >> 19U); in DMA2D_SetConfig() 2145 tmp = ((tmp3 << 5U) | (tmp2 << 11U) | tmp4); in DMA2D_SetConfig() 2150 tmp2 = (tmp2 >> 19U); in DMA2D_SetConfig() 2153 tmp = ((tmp3 << 5U) | (tmp2 << 10U) | (tmp1 << 15U) | tmp4); in DMA2D_SetConfig() 2158 tmp2 = (tmp2 >> 20U); in DMA2D_SetConfig() 2161 tmp = ((tmp3 << 4U) | (tmp2 << 8U) | (tmp1 << 12U) | tmp4); in DMA2D_SetConfig()
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D | stm32u5xx_hal_dcmi.c | 385 uint32_t tmp2; in HAL_DCMI_Start_DMA() local 502 tmp2 = hdcmi->DMA_Handle->LinkedListQueue->Head->LinkRegisters[cllr_offset]; in HAL_DCMI_Start_DMA() 507 … (tmp2 & DMA_CLLR_LA)))->LinkRegisters[NODE_CBR1_DEFAULT_OFFSET] = hdcmi->XferSize; in HAL_DCMI_Start_DMA() 511 (tmp2 & DMA_CLLR_LA)))->LinkRegisters[NODE_CSAR_DEFAULT_OFFSET] = \ in HAL_DCMI_Start_DMA() 516 (tmp2 & DMA_CLLR_LA)))->LinkRegisters[NODE_CDAR_DEFAULT_OFFSET] = \ in HAL_DCMI_Start_DMA() 1273 uint32_t tmp2; in DCMI_DMAXferCplt() local 1289 tmp2 = hdcmi->DMA_Handle->Instance->CLBAR & DMA_CLBAR_LBA; in DCMI_DMAXferCplt() 1290 pnode = (DMA_NodeTypeDef *)(uint32_t)(tmp1 | tmp2); in DCMI_DMAXferCplt()
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/hal_stm32-3.5.0/stm32cube/stm32l0xx/drivers/src/ |
D | stm32l0xx_hal_flash_ex.c | 525 uint32_t tmp2 = 0; in HAL_FLASHEx_OB_SelectPCROP() local 539 tmp2 = (uint32_t)(((uint32_t)((uint32_t)(tmp1) << 16U)) | ((uint32_t)optiontmp2)); in HAL_FLASHEx_OB_SelectPCROP() 547 OB->RDP = tmp2; in HAL_FLASHEx_OB_SelectPCROP() 567 uint32_t tmp2 = 0; in HAL_FLASHEx_OB_DeSelectPCROP() local 581 tmp2 = (uint32_t)(((uint32_t)((uint32_t)(tmp1) << 16U)) | ((uint32_t)optiontmp2)); in HAL_FLASHEx_OB_DeSelectPCROP() 589 OB->RDP = tmp2; in HAL_FLASHEx_OB_DeSelectPCROP() 823 uint32_t tmp1, tmp2; in FLASH_OB_RDPConfig() local 832 tmp2 = (uint32_t)(((uint32_t)((uint32_t)(~tmp1) << 16U)) | tmp1); in FLASH_OB_RDPConfig() 843 OB->RDP = tmp2; in FLASH_OB_RDPConfig()
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D | stm32l0xx_hal_dac_ex.c | 326 uint32_t tmp1 = 0U, tmp2 = 0U; in HAL_DAC_Start() local 343 tmp2 = hdac->Instance->CR & DAC_CR_TSEL1; in HAL_DAC_Start() 345 if((tmp1 == DAC_CR_TEN1) && (tmp2 == DAC_CR_TSEL1)) in HAL_DAC_Start() 354 tmp2 = hdac->Instance->CR & DAC_CR_TSEL2; in HAL_DAC_Start() 356 if((tmp1 == DAC_CR_TEN2) && (tmp2 == DAC_CR_TSEL2)) in HAL_DAC_Start() 686 uint32_t tmp1 = 0U, tmp2 = 0U; in HAL_DAC_Start() local 701 tmp2 = hdac->Instance->CR & DAC_CR_TSEL1; in HAL_DAC_Start() 703 if((tmp1 == DAC_CR_TEN1) && (tmp2 == DAC_CR_TSEL1)) in HAL_DAC_Start()
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/hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/src/ |
D | stm32h5xx_hal_dcmi.c | 385 uint32_t tmp2; in HAL_DCMI_Start_DMA() local 502 tmp2 = hdcmi->DMA_Handle->LinkedListQueue->Head->LinkRegisters[cllr_offset]; in HAL_DCMI_Start_DMA() 507 … (tmp2 & DMA_CLLR_LA)))->LinkRegisters[NODE_CBR1_DEFAULT_OFFSET] = hdcmi->XferSize; in HAL_DCMI_Start_DMA() 511 (tmp2 & DMA_CLLR_LA)))->LinkRegisters[NODE_CSAR_DEFAULT_OFFSET] = \ in HAL_DCMI_Start_DMA() 516 (tmp2 & DMA_CLLR_LA)))->LinkRegisters[NODE_CDAR_DEFAULT_OFFSET] = \ in HAL_DCMI_Start_DMA() 1273 uint32_t tmp2; in DCMI_DMAXferCplt() local 1289 tmp2 = hdcmi->DMA_Handle->Instance->CLBAR & DMA_CLBAR_LBA; in DCMI_DMAXferCplt() 1290 pnode = (DMA_NodeTypeDef *)(uint32_t)(tmp1 | tmp2); in DCMI_DMAXferCplt()
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/hal_stm32-3.5.0/stm32cube/stm32wbaxx/soc/ |
D | system_stm32wbaxx.c | 293 uint32_t tmp2; in SystemCoreClockUpdate() local 313 tmp2 = RCC->PLL1DIVR; in SystemCoreClockUpdate() 317 plln = (tmp2 & RCC_PLL1DIVR_PLL1N) + 1U; in SystemCoreClockUpdate() 318 pllr = ((tmp2 & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U; in SystemCoreClockUpdate()
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D | system_stm32wbaxx_s.c | 315 uint32_t tmp2; in SystemCoreClockUpdate() local 335 tmp2 = RCC->PLL1DIVR; in SystemCoreClockUpdate() 339 plln = (tmp2 & RCC_PLL1DIVR_PLL1N) + 1U; in SystemCoreClockUpdate() 340 pllr = ((tmp2 & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U; in SystemCoreClockUpdate()
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