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Searched refs:RCC_AHBENR_GPIOFEN (Results 1 – 25 of 48) sorted by relevance

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/hal_stm32-3.5.0/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_hal_rcc_ex.h175 SET_BIT(RCC->AHBENR, RCC_AHBENR_GPIOFEN);\
177 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIOFEN);\
188 #define __HAL_RCC_GPIOF_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_GPIOFEN))
629 #define __HAL_RCC_GPIOF_IS_CLK_ENABLED() ((RCC->AHBENR & (RCC_AHBENR_GPIOFEN)) != 0U)
631 #define __HAL_RCC_GPIOF_IS_CLK_DISABLED() ((RCC->AHBENR & (RCC_AHBENR_GPIOFEN)) == 0U)
Dstm32l1xx_ll_bus.h82 #define LL_AHB1_GRP1_PERIPH_GPIOF RCC_AHBENR_GPIOFEN
/hal_stm32-3.5.0/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_hal_rcc.h643 SET_BIT(RCC->AHBENR, RCC_AHBENR_GPIOFEN);\
645 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIOFEN);\
680 #define __HAL_RCC_GPIOF_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_GPIOFEN))
699 #define __HAL_RCC_GPIOF_IS_CLK_ENABLED() ((RCC->AHBENR & (RCC_AHBENR_GPIOFEN)) != RESET)
707 #define __HAL_RCC_GPIOF_IS_CLK_DISABLED() ((RCC->AHBENR & (RCC_AHBENR_GPIOFEN)) == RESET)
Dstm32f0xx_ll_bus.h89 #define LL_AHB1_GRP1_PERIPH_GPIOF RCC_AHBENR_GPIOFEN
/hal_stm32-3.5.0/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal_rcc.h710 SET_BIT(RCC->AHBENR, RCC_AHBENR_GPIOFEN);\
712 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIOFEN);\
755 #define __HAL_RCC_GPIOF_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_GPIOFEN))
904 #define __HAL_RCC_GPIOF_IS_CLK_ENABLED() ((RCC->AHBENR & (RCC_AHBENR_GPIOFEN)) != RESET)
915 #define __HAL_RCC_GPIOF_IS_CLK_DISABLED() ((RCC->AHBENR & (RCC_AHBENR_GPIOFEN)) == RESET)
Dstm32f3xx_ll_bus.h93 #define LL_AHB1_GRP1_PERIPH_GPIOF RCC_AHBENR_GPIOFEN
/hal_stm32-3.5.0/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h3074 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIOF clock ena… macro
Dstm32f030x8.h3103 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIOF clock ena… macro
Dstm32f070x6.h3140 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIOF clock ena… macro
Dstm32f070xb.h3253 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIOF clock ena… macro
Dstm32f030xc.h3391 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIOF clock ena… macro
Dstm32f031x6.h3200 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIOF clock ena… macro
Dstm32f038xx.h3175 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIOF clock ena… macro
Dstm32f058xx.h3632 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIOF clock ena… macro
Dstm32f051x8.h3657 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIOF clock ena… macro
Dstm32f071xb.h4097 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIOF clock ena… macro
/hal_stm32-3.5.0/stm32cube/stm32l1xx/soc/
Dstm32l151xca.h4466 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIO port F clo… macro
Dstm32l151xdx.h4519 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIO port F clo… macro
Dstm32l151xe.h4519 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIO port F clo… macro
Dstm32l152xdx.h4655 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIO port F clo… macro
Dstm32l152xe.h4655 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIO port F clo… macro
Dstm32l152xca.h4602 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIO port F clo… macro
Dstm32l162xe.h4788 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIO port F clo… macro
Dstm32l162xca.h4735 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIO port F clo… macro
/hal_stm32-3.5.0/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h5056 #define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIOF clock ena… macro

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