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Searched refs:I2C_XFER_CPLT_IT (Results 1 – 16 of 16) sorted by relevance

/hal_stm32-3.5.0/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_i2c.c394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro
4721 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT()
5356 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA()
6564 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt()
6615 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_MDMAMasterTransmitCplt()
6723 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt()
6774 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_MDMAMasterReceiveCplt()
7353 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7385 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7445 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
/hal_stm32-3.5.0/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_hal_i2c.c394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro
4412 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT()
5184 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA()
5323 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA()
6449 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt()
6527 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt()
7025 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7063 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7123 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
/hal_stm32-3.5.0/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_i2c.c394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro
4412 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT()
5184 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA()
5323 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA()
6449 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt()
6527 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt()
7007 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7045 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7105 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
/hal_stm32-3.5.0/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_hal_i2c.c394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro
4617 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT()
5401 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA()
5540 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA()
6705 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt()
6785 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt()
7294 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7328 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7395 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
/hal_stm32-3.5.0/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_hal_i2c.c394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro
4412 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT()
5184 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA()
5323 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA()
6449 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt()
6527 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt()
7004 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7042 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7102 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
/hal_stm32-3.5.0/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_hal_i2c.c394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro
4412 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT()
5184 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA()
5323 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA()
6449 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt()
6527 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt()
7004 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7042 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7102 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
/hal_stm32-3.5.0/stm32cube/stm32c0xx/drivers/src/
Dstm32c0xx_hal_i2c.c394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro
4617 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT()
5401 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA()
5540 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA()
6709 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt()
6789 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt()
7298 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7332 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7399 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
/hal_stm32-3.5.0/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_i2c.c394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro
4471 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT()
5243 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA()
5382 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA()
6525 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt()
6603 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt()
7113 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7151 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7211 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
/hal_stm32-3.5.0/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_hal_i2c.c394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro
4480 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT()
5252 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA()
5391 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA()
6536 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt()
6616 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt()
7122 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7155 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7221 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
/hal_stm32-3.5.0/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_hal_i2c.c394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro
4480 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT()
5252 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA()
5391 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA()
6536 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt()
6616 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt()
7122 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7155 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7221 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
/hal_stm32-3.5.0/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_hal_i2c.c394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro
4480 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT()
5252 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA()
5391 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA()
6536 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt()
6616 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt()
7122 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7155 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7221 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
/hal_stm32-3.5.0/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_i2c.c394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro
4471 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT()
5243 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA()
5382 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA()
6525 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt()
6603 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt()
7092 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7130 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7190 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
/hal_stm32-3.5.0/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_i2c.c394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro
4416 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT()
5051 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA()
6177 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt()
6255 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt()
6735 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
6767 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
6827 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
/hal_stm32-3.5.0/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_i2c.c394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro
4880 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT()
5659 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA()
5798 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA()
6964 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt()
7071 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt()
7606 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7640 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7707 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
/hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_i2c.c394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro
4825 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT()
5604 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA()
5743 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA()
6913 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt()
7020 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt()
7543 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7577 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7645 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()
/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_i2c.c394 #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene… macro
4880 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in HAL_I2C_Master_Abort_IT()
5659 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Master_ISR_DMA()
5798 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_Mem_ISR_DMA()
6964 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterTransmitCplt()
7071 I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); in I2C_DMAMasterReceiveCplt()
7606 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7640 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Enable_IRQ()
7707 if (InterruptRequest == I2C_XFER_CPLT_IT) in I2C_Disable_IRQ()