Home
last modified time | relevance | path

Searched refs:PWR_PDCRC_PC0_Pos (Results 1 – 25 of 41) sorted by relevance

12

/hal_stm32-3.4.0/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h5750 #define PWR_PDCRC_PC0_Pos (0U) macro
5751 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32wle5xx.h5750 #define PWR_PDCRC_PC0_Pos (0U) macro
5751 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32wl54xx.h6538 #define PWR_PDCRC_PC0_Pos (0U) macro
6539 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32wl55xx.h6538 #define PWR_PDCRC_PC0_Pos (0U) macro
6539 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32wl5mxx.h6538 #define PWR_PDCRC_PC0_Pos (0U) macro
6539 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
/hal_stm32-3.4.0/stm32cube/stm32l4xx/soc/
Dstm32l412xx.h5253 #define PWR_PDCRC_PC0_Pos (0U) macro
5254 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32l422xx.h5469 #define PWR_PDCRC_PC0_Pos (0U) macro
5470 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32l431xx.h8933 #define PWR_PDCRC_PC0_Pos (0U) macro
8934 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32l451xx.h9190 #define PWR_PDCRC_PC0_Pos (0U) macro
9191 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32l433xx.h9025 #define PWR_PDCRC_PC0_Pos (0U) macro
9026 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32l462xx.h9475 #define PWR_PDCRC_PC0_Pos (0U) macro
9476 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32l443xx.h9241 #define PWR_PDCRC_PC0_Pos (0U) macro
9242 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32l471xx.h9897 #define PWR_PDCRC_PC0_Pos (0U) macro
9898 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32l452xx.h9259 #define PWR_PDCRC_PC0_Pos (0U) macro
9260 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
/hal_stm32-3.4.0/stm32cube/stm32g4xx/soc/
Dstm32g431xx.h6905 #define PWR_PDCRC_PC0_Pos (0U) macro
6906 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32g441xx.h7126 #define PWR_PDCRC_PC0_Pos (0U) macro
7127 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32gbk1cb.h6891 #define PWR_PDCRC_PC0_Pos (0U) macro
6892 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32g473xx.h7654 #define PWR_PDCRC_PC0_Pos (0U) macro
7655 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32g471xx.h7140 #define PWR_PDCRC_PC0_Pos (0U) macro
7141 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32g491xx.h7069 #define PWR_PDCRC_PC0_Pos (0U) macro
7070 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32g4a1xx.h7290 #define PWR_PDCRC_PC0_Pos (0U) macro
7291 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32g483xx.h7875 #define PWR_PDCRC_PC0_Pos (0U) macro
7876 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
/hal_stm32-3.4.0/stm32cube/stm32wbxx/soc/
Dstm32wb35xx.h6706 #define PWR_PDCRC_PC0_Pos (0U) macro
6707 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32wb55xx.h6794 #define PWR_PDCRC_PC0_Pos (0U) macro
6795 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */
Dstm32wb5mxx.h6794 #define PWR_PDCRC_PC0_Pos (0U) macro
6795 #define PWR_PDCRC_PC0_Msk (0x1UL << PWR_PDCRC_PC0_Pos) /*!< 0x00000001 */

12