| /hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/ |
| D | efr32mg12p_cmu.h | 665 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 669 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/ |
| D | efm32jg12b_cmu.h | 665 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 669 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/ |
| D | efm32pg12b_cmu.h | 665 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 669 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/ |
| D | efr32fg13p_cmu.h | 672 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 676 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/ |
| D | efr32bg13p_cmu.h | 672 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 676 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| D | efr32bg13p732f512gm32.h | 2667 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 2671 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| D | efr32bg13p732f512gm48.h | 2667 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 2671 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| D | efr32bg13p733f512gm48.h | 2667 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 2671 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| D | efr32bg13p532f512gm48.h | 2667 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 2671 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| D | efr32bg13p632f512gm32.h | 2667 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 2671 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| D | efr32bg13p632f512gm48.h | 2667 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 2671 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| D | efr32bg13p632f512im32.h | 2667 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 2671 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| D | efr32bg13p632f512im48.h | 2667 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 2671 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| D | efr32bg13p532f512gm32.h | 2667 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 2671 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/ |
| D | efm32gg12b_cmu.h | 764 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 769 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| D | efm32gg12b390f1024gl112.h | 4600 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 4605 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| D | efm32gg12b390f512gl112.h | 4600 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 4605 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| D | efm32gg12b530f512il120.h | 5439 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 5444 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| D | efm32gg12b530f512im64.h | 5439 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 5444 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| D | efm32gg12b530f512iq100.h | 5439 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 5444 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| D | efm32gg12b530f512iq64.h | 5439 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 5444 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| D | efm32gg12b530f512gq100.h | 5439 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 5444 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/ |
| D | efm32gg11b_cmu.h | 764 #define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL … macro 769 #define CMU_DPLLCTRL_REFSEL_LFXO (_CMU_DPLLCTRL_REFSEL_LFXO << 3) …
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| /hal_silabs-latest/gecko/emlib/inc/ |
| D | em_cmu.h | 3075 cmuDPLLClkSel_Lfxo = _CMU_DPLLCTRL_REFSEL_LFXO, /**< LFXO is DPLL reference clock. */
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| /hal_silabs-latest/simplicity_sdk/platform/emlib/inc/ |
| D | em_cmu.h | 3076 cmuDPLLClkSel_Lfxo = _CMU_DPLLCTRL_REFSEL_LFXO, /**< LFXO is DPLL reference clock. */
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