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Searched refs:_CMU_DPLLCTRL_MODE_PHASELL (Results 1 – 25 of 80) sorted by relevance

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/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_cmu.h643 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
646 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_cmu.h643 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
646 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_cmu.h643 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
646 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_cmu.h650 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
653 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_cmu.h650 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
653 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
Defr32bg13p732f512gm32.h2645 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
2648 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
Defr32bg13p732f512gm48.h2645 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
2648 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
Defr32bg13p733f512gm48.h2645 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
2648 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
Defr32bg13p532f512gm48.h2645 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
2648 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
Defr32bg13p632f512gm32.h2645 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
2648 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
Defr32bg13p632f512gm48.h2645 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
2648 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
Defr32bg13p632f512im32.h2645 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
2648 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
Defr32bg13p632f512im48.h2645 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
2648 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
Defr32bg13p532f512gm32.h2645 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
2648 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_cmu.h742 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
745 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
Defm32gg12b390f1024gl112.h4578 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
4581 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
Defm32gg12b390f512gl112.h4578 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
4581 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
Defm32gg12b530f512il120.h5417 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
5420 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
Defm32gg12b530f512im64.h5417 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
5420 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
Defm32gg12b530f512iq100.h5417 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
5420 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
Defm32gg12b530f512iq64.h5417 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
5420 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
Defm32gg12b530f512gq100.h5417 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
5420 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_cmu.h742 #define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL … macro
745 #define CMU_DPLLCTRL_MODE_PHASELL (_CMU_DPLLCTRL_MODE_PHASELL << 0) …
/hal_silabs-latest/gecko/emlib/inc/
Dem_cmu.h3088 cmuDPLLLockMode_Phase = _CMU_DPLLCTRL_MODE_PHASELL /**< Phase lock mode. */
/hal_silabs-latest/simplicity_sdk/platform/emlib/inc/
Dem_cmu.h3089 cmuDPLLLockMode_Phase = _CMU_DPLLCTRL_MODE_PHASELL /**< Phase lock mode. */

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