| /hal_silabs-latest/gecko/emlib/src/ |
| D | em_dma.c | 179 primDescr = ((DMA_DESCRIPTOR_TypeDef *)(DMA->CTRLBASE)) + channel; in DMA_Prepare()
185 descr = ((DMA_DESCRIPTOR_TypeDef *)(DMA->ALTCTRLBASE)) + channel; in DMA_Prepare()
216 DMA->CHUSEBURSTS = chBit; in DMA_Prepare()
218 DMA->CHUSEBURSTC = chBit; in DMA_Prepare()
222 DMA->CHALTC = chBit; in DMA_Prepare()
224 DMA->CHALTS = chBit; in DMA_Prepare()
270 pending = DMA->IF; in DMA_IRQHandler()
271 pending &= DMA->IEN; in DMA_IRQHandler()
278 prio = DMA->CHPRIS; in DMA_IRQHandler()
286 DMA_DESCRIPTOR_TypeDef *descr = (DMA_DESCRIPTOR_TypeDef *)(DMA->CTRLBASE); in DMA_IRQHandler()
[all …]
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| /hal_silabs-latest/gecko/emlib/inc/ |
| D | em_dma.h | 378 DMA->LOOP0 = _DMA_LOOP0_RESETVALUE; in DMA_ResetLoop()
381 DMA->LOOP1 = _DMA_LOOP1_RESETVALUE; in DMA_ResetLoop()
402 DMA->RECT0 = _DMA_RECT0_RESETVALUE; in DMA_ResetRect()
432 DMA->IFC = flags; in DMA_IntClear()
445 DMA->IEN &= ~flags; in DMA_IntDisable()
463 DMA->IEN |= flags; in DMA_IntEnable()
479 return DMA->IF; in DMA_IntGet()
500 ien = DMA->IEN; in DMA_IntGetEnabled()
501 return DMA->IF & ien; in DMA_IntGetEnabled()
514 DMA->IFS = flags; in DMA_IntSet()
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| /hal_silabs-latest/simplicity_sdk/platform/emdrv/dmadrv/src/ |
| D | dmadrv.c | 918 if ( DMA->IF & (1 << channelId) ) in DMADRV_TransferCompletePending()
977 iflag = DMA->IF; in DMADRV_TransferDone()
1040 iflag = DMA->IF; in DMADRV_TransferRemainingCount()
1376 DMA->IFC = 1 << channelId; in StartTransfer()
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32HG/Include/ |
| D | efm32hg309f32.h | 321 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32hg309f64.h | 321 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32hg310f32.h | 321 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32hg310f64.h | 321 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32hg322f32.h | 321 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32hg322f64.h | 321 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32hg350f32.h | 321 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32hg350f64.h | 321 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32WG/Include/ |
| D | efm32wg980f64.h | 392 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32wg990f128.h | 392 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32wg990f256.h | 392 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32wg990f64.h | 392 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32wg995f128.h | 392 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32wg900f256.h | 392 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32wg980f128.h | 392 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32wg980f256.h | 392 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32wg995f256.h | 392 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32wg995f64.h | 392 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32wg380f128.h | 430 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32wg380f256.h | 430 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| D | efm32wg380f64.h | 430 #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ macro
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| /hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/core/chip/src/iPMU_prog/iPMU_dotc/ |
| D | ipmu_apis.c | 872 DMA = 0x00000001; in get_ipmu_temperature()
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