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Searched refs:MSC_STATUS_INVADDR (Results 1 – 25 of 76) sorted by relevance

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/hal_silabs-3.6.0/gecko/emlib/src/
Dem_msc.c347 if (status & MSC_STATUS_INVADDR) { in mscStatusWait()
412 if (MSC->STATUS & MSC_STATUS_INVADDR) { in writeBurst()
747 if (MSC->STATUS & MSC_STATUS_INVADDR) { in MSC_WriteWordDma()
959 if (MSC->STATUS & MSC_STATUS_INVADDR) { in MSC_LoadVerifyAddress()
1253 if (MSC->STATUS & MSC_STATUS_INVADDR) { in MSC_ErasePage()
1463 if (MSC->STATUS & MSC_STATUS_INVADDR) { in MSC_WriteWordDma()
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg_msc.h204 #define MSC_STATUS_INVADDR (0x1UL << 2) /**< Invali… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_msc.h233 #define MSC_STATUS_INVADDR (0x1UL << 2) /**< Invali… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_msc.h237 #define MSC_STATUS_INVADDR (0x1UL << 2) /**< Invali… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_msc.h277 #define MSC_STATUS_INVADDR (0x1UL << 2) /*… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_msc.h237 #define MSC_STATUS_INVADDR (0x1UL << 2) /**< Invali… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_msc.h251 #define MSC_STATUS_INVADDR (0x1UL << 2) … macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_msc.h295 #define MSC_STATUS_INVADDR (0x1UL << 2) /*… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_msc.h251 #define MSC_STATUS_INVADDR (0x1UL << 2) … macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_msc.h281 #define MSC_STATUS_INVADDR (0x1UL << 2) /*… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_msc.h265 #define MSC_STATUS_INVADDR (0x1UL << 2) … macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_msc.h265 #define MSC_STATUS_INVADDR (0x1UL << 2) … macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_msc.h265 #define MSC_STATUS_INVADDR (0x1UL << 2) … macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_msc.h311 #define MSC_STATUS_INVADDR (0x1UL << 2) /*… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_msc.h297 #define MSC_STATUS_INVADDR (0x1UL << 2) … macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_msc.h298 #define MSC_STATUS_INVADDR (0x1UL << 2) … macro
Defm32gg12b530f512il120.h2438 #define MSC_STATUS_INVADDR (0x1UL << 2) … macro
Defm32gg12b530f512im64.h2438 #define MSC_STATUS_INVADDR (0x1UL << 2) … macro
Defm32gg12b530f512iq100.h2438 #define MSC_STATUS_INVADDR (0x1UL << 2) … macro
Defm32gg12b530f512iq64.h2438 #define MSC_STATUS_INVADDR (0x1UL << 2) … macro
Defm32gg12b530f512gm64.h2438 #define MSC_STATUS_INVADDR (0x1UL << 2) … macro
Defm32gg12b530f512gq100.h2438 #define MSC_STATUS_INVADDR (0x1UL << 2) … macro
Defm32gg12b530f512gq64.h2438 #define MSC_STATUS_INVADDR (0x1UL << 2) … macro
Defm32gg12b530f512il112.h2438 #define MSC_STATUS_INVADDR (0x1UL << 2) … macro
Defm32gg12b110f1024gm64.h2430 #define MSC_STATUS_INVADDR (0x1UL << 2) … macro

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