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Searched refs:channel (Results 1 – 25 of 69) sorted by relevance

123

/hal_renesas-latest/drivers/ra/fsp/src/bsp/mcu/all/
Dbsp_module_stop.h35 …#define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
37 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
38 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
43 …#define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; …
45 … BSP_MSTP_REG_ ## ip(channel) &= \
46 … (BSP_MSTP_REG_TYPE_ ## ip(channel)) ~BSP_MSTP_BIT_ ## ip(channel); \
47 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
58 …#define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
60 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
61 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
[all …]
/hal_renesas-latest/drivers/rz/fsp/src/rzn/bsp/mcu/all/
Dbsp_module_stop.h32 #define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
34 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
35 … BSP_MSTP_REG_ ## ip(channel); \
36 … BSP_MSTP_DMY_ ## ip(channel); \
37 … BSP_MSTP_DMY_ ## ip(channel); \
38 … BSP_MSTP_DMY_ ## ip(channel); \
39 … BSP_MSTP_DMY_ ## ip(channel); \
40 … BSP_MSTP_DMY_ ## ip(channel); \
49 #define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
51 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
[all …]
Dbsp_irq.c129 uint32_t bsp_prv_irq_gpt_reg_num_get (uint32_t channel) in bsp_prv_irq_gpt_reg_num_get() argument
131 return (channel % BSP_FEATURE_GPT_SAFETY_BASE_CHANNEL) / BSP_IRQ_GPT_REGISTER_DIVISION; in bsp_prv_irq_gpt_reg_num_get()
142 uint32_t bsp_prv_irq_gpt_selected_shift_num_get (IRQn_Type irq, uint32_t channel) in bsp_prv_irq_gpt_selected_shift_num_get() argument
146 return channel % BSP_IRQ_GPT_REGISTER_DIVISION ? in bsp_prv_irq_gpt_selected_shift_num_get()
158 uint32_t bsp_prv_irq_gpt_combined_table_num_get (uint32_t channel) in bsp_prv_irq_gpt_combined_table_num_get() argument
160 return (channel % BSP_FEATURE_GPT_CHANNEL) / BSP_IRQ_GPT_REGISTER_DIVISION; in bsp_prv_irq_gpt_combined_table_num_get()
219 uint32_t bsp_prv_irq_gpt_combined_shift_num_get (uint32_t channel, bsp_irq_gpt_combined_event_t eve… in bsp_prv_irq_gpt_combined_shift_num_get() argument
221 …return channel % BSP_IRQ_GPT_REGISTER_DIVISION ? (uint32_t) event_source + BSP_IRQ_GPT_IY_SHIFT_NU… in bsp_prv_irq_gpt_combined_shift_num_get()
/hal_renesas-latest/drivers/rz/fsp/src/rzg/bsp/mcu/all/
Dbsp_clocks.h29 #define R_BSP_MODULE_CLKON(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
31 … BSP_CLKON_REG_ ## ip(channel) = 0x00000000U \
32 … | (BSP_CLKON_BIT_ ## ip(channel) << \
34 … | (BSP_CLKON_BIT_ ## ip(channel)); \
35 … while ((BSP_CLKMON_REG_ ## ip(channel) & \
36 … BSP_CLKMON_BIT_ ## ip(channel)) == 0U) \
46 #define R_BSP_MODULE_CLKOFF(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
48 … BSP_CLKON_REG_ ## ip(channel) = 0x00000000U \
49 … | (BSP_CLKON_BIT_ ## ip(channel) << \
51 … while ((BSP_CLKMON_REG_ ## ip(channel) & \
[all …]
Dbsp_module_stop.h28 #define R_BSP_MSTP_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
30 … BSP_MSTP_REG_ ## ip(channel) = 0x00000000U \
31 … | (BSP_MSTP_BIT_ ## ip(channel) << 16U); \
32 … BSP_MSTP_REG_ ## ip(channel); \
41 #define R_BSP_MSTP_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
43 … BSP_MSTP_REG_ ## ip(channel) = 0x0000FFFFU \
44 … | (BSP_MSTP_BIT_ ## ip(channel) << 16U); \
45 … BSP_MSTP_REG_ ## ip(channel); \
49 #define BSP_MSTP_REG_FSP_IP_GTM(channel) R_CPG->CPG_BUS_REG0_MSTOP argument
50 #define BSP_MSTP_BIT_FSP_IP_GTM(channel) (1U << (R_CPG_CPG_BUS_REG0_MSTOP_MSTOP4_ON_Pos + cha… argument
[all …]
Dbsp_io.h620 __STATIC_INLINE void R_BSP_EthernetModeCfg (bsp_ethernet_channel_t channel, bsp_ethernet_mode_t mod… in R_BSP_EthernetModeCfg() argument
626 if (channel == BSP_ETHERNET_CHANNEL_0) in R_BSP_EthernetModeCfg()
638 if (BSP_ETHERNET_CHANNEL_0 == channel) in R_BSP_EthernetModeCfg()
642 else if (BSP_ETHERNET_CHANNEL_1 == channel) in R_BSP_EthernetModeCfg()
651 reg_value = (uint32_t) ((reg_value & (uint32_t) (~(1 << channel))) | (mode << channel)); in R_BSP_EthernetModeCfg()
657 reg_value = (uint8_t) ((reg_value & (uint8_t) (~(1 << channel))) | (mode << channel)); in R_BSP_EthernetModeCfg()
662 FSP_PARAMETER_NOT_USED(channel); in R_BSP_EthernetModeCfg()
670 __STATIC_INLINE void R_BSP_SDVoltageModeCfg (bsp_sd_channel_t channel, bsp_sd_voltage_t voltage) in R_BSP_SDVoltageModeCfg() argument
673 if (BSP_SD_CHANNEL_0 == channel) in R_BSP_SDVoltageModeCfg()
681 else if (BSP_SD_CHANNEL_1 == channel) in R_BSP_SDVoltageModeCfg()
[all …]
/hal_renesas-latest/drivers/rz/fsp/src/rzg/r_dmac_b/
Dr_dmac_b.c27 #define DMAC_B_PRV_CHANNEL(channel) (channel % 8) argument
28 #define DMAC_B_PRV_GROUP(channel) (channel / 8) argument
233 uint8_t group = DMAC_B_PRV_GROUP(p_extend->channel); in R_DMAC_B_SoftwareStart()
234 uint8_t channel = DMAC_B_PRV_CHANNEL(p_extend->channel); in R_DMAC_B_SoftwareStart() local
237 p_ctrl->p_reg->GRP[group].CH[channel].CHCTRL = R_DMAC_B0_GRP_CH_CHCTRL_STG_Msk; in R_DMAC_B_SoftwareStart()
260 uint8_t group = DMAC_B_PRV_GROUP(p_extend->channel); in R_DMAC_B_SoftwareStop()
261 uint8_t channel = DMAC_B_PRV_CHANNEL(p_extend->channel); in R_DMAC_B_SoftwareStop() local
264 p_ctrl->p_reg->GRP[group].CH[channel].CHCTRL = R_DMAC_B0_GRP_CH_CHCTRL_SETSUS_Msk; in R_DMAC_B_SoftwareStop()
267 if (!(p_ctrl->p_reg->GRP[group].CH[channel].CHSTAT & R_DMAC_B0_GRP_CH_CHSTAT_EN_Msk)) in R_DMAC_B_SoftwareStop()
270 p_ctrl->p_reg->GRP[group].CH[channel].CHCTRL = R_DMAC_B0_GRP_CH_CHCTRL_SWRST_Msk; in R_DMAC_B_SoftwareStop()
[all …]
/hal_renesas-latest/drivers/rz/fsp/src/rzg/bsp/mcu/rzg3s/
Dbsp_dmac.h44 #define R_BSP_DMAC_ACTIVATION_SOURCE_ENABLE(unit, channel, activation) {if (0 == (channel / 2)) … argument
50 … << (16U * (channel % 2))); \
59 … (channel % \
61 … R_DMAC_B0->GRP[channel / \
63 … channel % \
73 … else if (1 == (channel / 2)) { \
79 … << (16U * (channel % 2))); \
88 … (channel % \
90 … R_DMAC_B0->GRP[channel / \
92 … channel % \
[all …]
Dbsp_override.h226 #define BSP_CLKON_REG_FSP_IP_GTM(channel) (R_CPG->CPG_CLKON_GTM) argument
227 #define BSP_CLKON_BIT_FSP_IP_GTM(channel) (1U << (R_CPG_CPG_CLKON_GTM_CLK0_ON_Pos + (channel))) argument
228 #define BSP_CLKMON_REG_FSP_IP_GTM(channel) (R_CPG->CPG_CLKMON_GTM) argument
229 #define BSP_CLKMON_BIT_FSP_IP_GTM(channel) (1U << (R_CPG_CPG_CLKMON_GTM_CLK0_MON_Pos + (channel… argument
230 #define BSP_RST_REG_FSP_IP_GTM(channel) (R_CPG->CPG_RST_GTM) argument
231 #define BSP_RST_BIT_FSP_IP_GTM(channel) (1U << (R_CPG_CPG_RST_GTM_UNIT0_RSTB_Pos + (channel)… argument
232 #define BSP_RSTMON_REG_FSP_IP_GTM(channel) (R_CPG->CPG_RSTMON_GTM) argument
233 #define BSP_RSTMON_BIT_FSP_IP_GTM(channel) (1U << (R_CPG_CPG_RSTMON_GTM_RST0_MON_Pos + (channel… argument
235 #define BSP_CLKON_REG_FSP_IP_XSPI(channel) (R_CPG->CPG_CLKON_SPI) argument
236 #define BSP_CLKON_BIT_FSP_IP_XSPI(channel) (0xFU << (R_CPG_CPG_CLKON_SPI_CLK0_ON_Pos)) argument
[all …]
/hal_renesas-latest/zephyr/rz/portable/rzn/
Dbsp_irq.h141 uint32_t bsp_prv_irq_gpt_reg_num_get(uint32_t channel);
142 uint32_t bsp_prv_irq_gpt_selected_shift_num_get(IRQn_Type irq, uint32_t channel);
143 uint32_t bsp_prv_irq_gpt_combined_shift_num_get(uint32_t channel, bsp_irq_gpt_combined_event_t even…
147 uint32_t bsp_prv_irq_gpt_combined_table_num_get(uint32_t channel);
356 uint32_t channel = bsp_prv_irq_gpt_channel_get(irq); in R_BSP_IrqGptSelectedSet() local
357 uint32_t reg_num = bsp_prv_irq_gpt_reg_num_get(channel); in R_BSP_IrqGptSelectedSet()
358 uint32_t shift_num = bsp_prv_irq_gpt_selected_shift_num_get(irq, channel); in R_BSP_IrqGptSelectedSet()
360 if (channel < BSP_FEATURE_GPT_SAFETY_BASE_CHANNEL) in R_BSP_IrqGptSelectedSet()
382 uint32_t channel = bsp_prv_irq_gpt_channel_get(irq); in R_BSP_IrqGptSelectedClear() local
383 uint32_t reg_num = bsp_prv_irq_gpt_reg_num_get(channel); in R_BSP_IrqGptSelectedClear()
[all …]
/hal_renesas-latest/drivers/rz/fsp/src/rzn/r_icu/
Dr_icu.c24 #define ICU_NS_PORTNF_OFFSET(channel) (channel * 2) argument
25 #define ICU_S_PORTNF_OFFSET(channel) ((channel - ICU_SAFETY_REGISTER_OFFSET) * 2) argument
98 …FSP_ERROR_RETURN(0 != ((1U << p_cfg->channel) & BSP_FEATURE_ICU_IRQ_CHANNELS_MASK), FSP_ERR_IP_CHA… in R_ICU_ExternalIrqOpen()
108 p_instance_ctrl->channel = p_cfg->channel; in R_ICU_ExternalIrqOpen()
115 if (p_instance_ctrl->channel < ICU_SAFETY_REGISTER_OFFSET) in R_ICU_ExternalIrqOpen()
119 clksel &= ~(ICU_PORTNF_CLKSEL_MASK << ICU_NS_PORTNF_OFFSET(p_cfg->channel)); in R_ICU_ExternalIrqOpen()
120 clksel |= (uint32_t) (p_cfg->clock_source_div << ICU_NS_PORTNF_OFFSET(p_cfg->channel)); in R_ICU_ExternalIrqOpen()
124 fltsel &= ~(ICU_PORTNF_FLTSEL_MASK << p_cfg->channel); in R_ICU_ExternalIrqOpen()
125 fltsel |= (uint32_t) (((true == p_cfg->filter_enable) ? 1U : 0U) << p_cfg->channel); in R_ICU_ExternalIrqOpen()
129 md &= ~(ICU_PORTNF_MD_MASK << ICU_NS_PORTNF_OFFSET(p_cfg->channel)); in R_ICU_ExternalIrqOpen()
[all …]
/hal_renesas-latest/drivers/rz/fsp/src/rzg/r_intc_irq/
Dr_intc_irq.c94 …FSP_ERROR_RETURN(0 != ((1U << p_cfg->channel) & BSP_FEATURE_INTC_IRQ_VALID_CHANNEL_MASK), FSP_ERR_… in R_INTC_IRQ_ExternalIrqOpen()
108 p_ctrl->channel = p_cfg->channel; in R_INTC_IRQ_ExternalIrqOpen()
135 iitsr &= ~(INTC_IRQ_IITSR_IITSEL_MASK << (p_ctrl->channel * INTC_IRQ_IITSR_IITSEL_WIDTH)); in R_INTC_IRQ_ExternalIrqOpen()
136 iitsr |= (trigger << (p_ctrl->channel * INTC_IRQ_IITSR_IITSEL_WIDTH)); in R_INTC_IRQ_ExternalIrqOpen()
151 R_INTC_IM33->ISCR = ~(INTC_IRQ_ISCR_ISTAT_MASK << p_ctrl->channel); in R_INTC_IRQ_ExternalIrqOpen()
316 iitsr &= (INTC_IRQ_IITSR_IITSEL_MASK << (p_ctrl->channel * INTC_IRQ_IITSR_IITSEL_WIDTH)); in r_intc_irq_isr()
317 iitsr >>= (p_ctrl->channel * INTC_IRQ_IITSR_IITSEL_WIDTH); in r_intc_irq_isr()
331 R_INTC_IM33->ISCR = ~(INTC_IRQ_ISCR_ISTAT_MASK << p_ctrl->channel); in r_intc_irq_isr()
348 args.channel = p_ctrl->channel; in r_intc_irq_isr()
358 p_ctrl->p_callback_memory->channel = p_ctrl->channel; in r_intc_irq_isr()
[all …]
/hal_renesas-latest/drivers/ra/fsp/src/r_ospi_b/
Dr_ospi_b.c104 static void r_ospi_b_direct_transfer(ospi_b_device_number_t channel,
185 …FSP_ERROR_RETURN((g_ospi_b_channels_open_flags & (1U << p_cfg_extend->channel)) == 0, FSP_ERR_ALRE… in R_OSPI_B_Open()
194 p_instance_ctrl->channel = p_cfg_extend->channel; in R_OSPI_B_Open()
224 if (OSPI_B_DEVICE_NUMBER_0 == p_instance_ctrl->channel) in R_OSPI_B_Open()
238 R_XSPI->LIOCFGCS[p_cfg_extend->channel] = liocfg; in R_OSPI_B_Open()
241 if (OSPI_B_DEVICE_NUMBER_0 == p_instance_ctrl->channel) in R_OSPI_B_Open()
265 R_XSPI->LIOCFGCS[p_cfg_extend->channel] = liocfg; in R_OSPI_B_Open()
282 if (p_instance_ctrl->channel == 0) in R_OSPI_B_Open()
294 g_ospi_b_channels_open_flags |= (1U << p_instance_ctrl->channel); in R_OSPI_B_Open()
367 r_ospi_b_direct_transfer(p_instance_ctrl->channel, p_transfer, direction); in R_OSPI_B_DirectTransfer()
[all …]
/hal_renesas-latest/drivers/ra/fsp/src/r_canfd/
Dr_canfd.c69 #define CANFD_INTER_CH(channel) (0U) argument
71 #define CANFD_INTER_CH(channel) (channel) argument
74 #define CANFD_PRV_CFIFO_INDEX(buffer, channel) ((buffer) + ((channel) * CANFD_PRV_CFIFO_CHANNEL_… argument
183 uint32_t channel = p_cfg->channel; in R_CANFD_Open() local
187 FSP_ERROR_RETURN(channel < BSP_FEATURE_CANFD_NUM_CHANNELS * BSP_FEATURE_CANFD_NUM_INSTANCES, in R_CANFD_Open()
189 FSP_ERROR_RETURN(NULL == gp_ctrl[channel], FSP_ERR_IN_USE); in R_CANFD_Open()
230 uint32_t channel = p_cfg->channel; in R_CANFD_Open() local
241 … (R_CANFD_Type *) ((uint32_t) R_CANFD0 + (channel * ((uint32_t) R_CANFD1 - (uint32_t) R_CANFD0))); in R_CANFD_Open()
260 R_BSP_MODULE_START(FSP_IP_CANFD, channel); in R_CANFD_Open()
283 if (channel == 1) in R_CANFD_Open()
[all …]
/hal_renesas-latest/drivers/rz/fsp/src/rzg/r_canfd/
Dr_canfd.c57 #define CANFD_INTER_CH(channel) (0U) argument
59 #define CANFD_INTER_CH(channel) (channel) argument
171 uint32_t channel = p_cfg->channel; in R_CANFD_Open() local
175 FSP_ERROR_RETURN(channel < BSP_FEATURE_CANFD_NUM_CHANNELS * BSP_FEATURE_CANFD_NUM_INSTANCES, in R_CANFD_Open()
177 FSP_ERROR_RETURN(NULL == gp_ctrl[channel], FSP_ERR_IN_USE); in R_CANFD_Open()
207 uint32_t channel = p_cfg->channel; in R_CANFD_Open() local
218 … (R_CANFD_Type *) ((uint32_t) R_CANFD0 + (channel * ((uint32_t) R_CANFD1 - (uint32_t) R_CANFD0))); in R_CANFD_Open()
236 R_BSP_MODULE_START(FSP_IP_CANFD, channel); in R_CANFD_Open()
294 if (CANFD_CFG_GLOBAL_ERROR_CH == channel) in R_CANFD_Open()
302 gp_ctrl[channel] = p_ctrl; in R_CANFD_Open()
[all …]
/hal_renesas-latest/drivers/ra/fsp/src/r_icu/
Dr_icu.c105 …FSP_ERROR_RETURN(0 != ((1U << p_cfg->channel) & BSP_FEATURE_ICU_IRQ_CHANNELS_MASK), FSP_ERR_IP_CHA… in R_ICU_ExternalIrqOpen()
133 p_ctrl->channel = p_cfg->channel; in R_ICU_ExternalIrqOpen()
138 R_ICU->IRQCR[p_ctrl->channel] = 0U; in R_ICU_ExternalIrqOpen()
153 R_ICU->IRQCR[p_ctrl->channel] = irqcr; in R_ICU_ExternalIrqOpen()
322 if (EXTERNAL_IRQ_TRIG_LEVEL_LOW == R_ICU->IRQCR_b[p_ctrl->channel].IRQMD) in r_icu_isr()
343 args.channel = p_ctrl->channel; in r_icu_isr()
353 p_ctrl->p_callback_memory->channel = p_ctrl->channel; in r_icu_isr()
368 args.channel = p_ctrl->channel; in r_icu_isr()
/hal_renesas-latest/drivers/rz/fsp/src/rzg/r_mhu_ns/
Dr_mhu_ns.c100 (p_cfg->channel * in R_MHU_NS_Open()
103 p_instance_ctrl->channel = p_cfg->channel; in R_MHU_NS_Open()
106 ((1U << p_cfg->channel) & in R_MHU_NS_Open()
133 (uint32_t *) (g_shmem_base + (MHU_NS_SHMEM_CH_SIZE * p_cfg->channel) + in R_MHU_NS_Open()
136 (uint32_t *) (g_shmem_base + (MHU_NS_SHMEM_CH_SIZE * p_cfg->channel) + in R_MHU_NS_Open()
142 (uint32_t *) (g_shmem_base + (MHU_NS_SHMEM_CH_SIZE * p_cfg->channel) + in R_MHU_NS_Open()
145 (uint32_t *) (g_shmem_base + (MHU_NS_SHMEM_CH_SIZE * p_cfg->channel) + in R_MHU_NS_Open()
151 R_BSP_MODULE_START(FSP_IP_MHU, p_cfg->channel); in R_MHU_NS_Open()
315 …FSP_ERROR_RETURN(((1U << p_cfg->channel) & BSP_FEATURE_MHU_NS_VALID_CHANNEL_MASK), FSP_ERR_INVALID… in r_mhu_ns_open_param_checking()
486 p_args->channel = p_instance_ctrl->channel; in R_MHU_NS_IsrSub()
/hal_renesas-latest/drivers/rz/fsp/src/rzg/r_intc_nmi/
Dr_intc_nmi.c99 p_ctrl->channel = p_cfg->channel; in R_INTC_NMI_ExternalIrqOpen()
294 args.channel = p_ctrl->channel; in r_intc_nmi_isr()
304 p_ctrl->p_callback_memory->channel = p_ctrl->channel; in r_intc_nmi_isr()
319 args.channel = p_ctrl->channel; in r_intc_nmi_isr()
/hal_renesas-latest/drivers/ra/fsp/src/r_dac/
Dr_dac.c100 …FSP_ERROR_RETURN(p_cfg->channel < (uint8_t) BSP_FEATURE_DAC_MAX_CHANNELS, FSP_ERR_IP_CHANNEL_NOT_P… in R_DAC_Open()
108 uint8_t unit = p_cfg->channel / DAC_MAX_CHANNELS_PER_UNIT; in R_DAC_Open()
114 p_ctrl->channel_index = p_cfg->channel % DAC_MAX_CHANNELS_PER_UNIT; in R_DAC_Open()
117 R_BSP_MODULE_START(FSP_IP_DAC, p_cfg->channel / DAC_MAX_CHANNELS_PER_UNIT); in R_DAC_Open()
211 p_ctrl->channel = p_cfg->channel; in R_DAC_Open()
/hal_renesas-latest/drivers/ra/fsp/src/r_agt/
Dr_agt.c59 … channel) ((uint8_t) ((AGT_PRV_IS_AGTW(p_instance_ctrl)) ? (channel) : (( \ argument
60 … channel) \
176 uint32_t channel_base_address = base_address + (p_cfg->channel * AGT_PRV_CHANNEL_SIZE); in R_AGT_Open()
182 … R_BSP_MODULE_START(FSP_IP_AGT, AGT_PRV_CHANNEL_OFFSET_AGT_AGTW(p_instance_ctrl, p_cfg->channel)); in R_AGT_Open()
529 …agt_periods[AGT_PRV_CHANNEL_OFFSET_AGT_AGTW(p_instance_ctrl, p_instance_ctrl->p_cfg->channel - 1)]) in R_AGT_InfoGet()
540 … p_instance_ctrl->p_cfg->channel - 1)]; in R_AGT_InfoGet()
725 …FSP_ERROR_RETURN(((1U << p_cfg->channel) & BSP_FEATURE_AGT_VALID_CHANNEL_MASK), FSP_ERR_IP_CHANNEL… in r_agt_open_param_checking()
729 FSP_ASSERT((AGT_CLOCK_AGT_UNDERFLOW != p_extend->count_source) || (p_cfg->channel & 1U)); in r_agt_open_param_checking()
944 … p_instance_ctrl->p_cfg->channel)] = period_counts; in r_agt_period_register_set()
/hal_renesas-latest/drivers/ra/fsp/src/r_ether/
Dr_ether.c276 …l->p_reg_etherc = ((R_ETHERC0_Type *) (R_ETHERC0_BASE + (ETHER_ETHERC_REG_SIZE * p_cfg->channel))); in R_ETHER_Open()
278 … ((R_ETHERC_EDMAC_Type *) (R_ETHERC_EDMAC_BASE + (ETHER_ETHERC_EDMAC_REG_SIZE * p_cfg->channel))); in R_ETHER_Open()
426 R_BSP_MODULE_STOP(FSP_IP_ETHER, p_instance_ctrl->p_ether_cfg->channel); in R_ETHER_Close()
615 callback_arg.channel = p_instance_ctrl->p_ether_cfg->channel; in R_ETHER_LinkProcess()
724 callback_arg.channel = p_instance_ctrl->p_ether_cfg->channel; in R_ETHER_LinkProcess()
775 callback_arg.channel = p_instance_ctrl->p_ether_cfg->channel; in R_ETHER_LinkProcess()
1217 ETHER_ERROR_RETURN((BSP_FEATURE_ETHER_MAX_CHANNELS > p_cfg->channel), FSP_ERR_INVALID_CHANNEL); in ether_open_param_check()
1873 p_args->channel = p_instance_ctrl->p_ether_cfg->channel; in ether_call_callback()
1975 callback_arg.channel = p_instance_ctrl->p_ether_cfg->channel; in ether_eint_isr()
/hal_renesas-latest/drivers/ra/fsp/src/r_spi_b/
Dr_spi_b.c21 #define SPI_B_REG(channel) ((R_SPI_B0_Type *) ((uint32_t) R_SPI_B0 + \ argument
23 (channel)))
139 FSP_ERROR_RETURN(BSP_FEATURE_SPI_MAX_CHANNEL > p_cfg->channel, FSP_ERR_IP_CHANNEL_NOT_PRESENT); in R_SPI_B_Open()
170 p_ctrl->p_regs = SPI_B_REG(p_ctrl->p_cfg->channel); in R_SPI_B_Open()
459 void * p_spdr = (void *) &(SPI_B_REG(p_cfg->channel)->SPDR); in r_spi_b_transfer_config()
610 R_BSP_MODULE_START(FSP_IP_SPI, p_ctrl->p_cfg->channel); in r_spi_b_hw_config()
944 p_args->channel = p_ctrl->p_cfg->channel; in r_spi_b_call_callback()
/hal_renesas-latest/drivers/rz/fsp/inc/api/
Dr_mhu_api.h57 uint32_t channel; ///< Channel where the receive interrupt occurred. member
65 … uint32_t channel; ///< Identifier recognizable by implementation member
Dr_external_irq_api.h46 uint32_t channel; ///< The physical hardware channel that caused the interrupt. member
79 uint8_t channel; ///< Hardware channel used. member
/hal_renesas-latest/drivers/ra/fsp/inc/api/
Dr_external_irq_api.h46 uint32_t channel; ///< The physical hardware channel that caused the interrupt. member
79 uint8_t channel; ///< Hardware channel used. member

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