Searched refs:assert (Results 1 – 15 of 15) sorted by relevance
82 assert(pd < PD_COUNT); in da1469x_pd_load_trimv()95 assert(0); in da1469x_pd_load_trimv()112 assert(pd < PD_COUNT); in da1469x_pd_apply_trimv()222 assert(g_device_id != CHIP_VARIANT_UNKNOWN); in da1469x_pd_init()243 assert(pd < PD_COUNT); in da1469x_pd_get_ref_cnt()258 assert(pd < PD_COUNT); in da1469x_pd_acquire_internal()264 assert(pdd->refcnt < UINT8_MAX); in da1469x_pd_acquire_internal()306 assert(pd < PD_COUNT); in da1469x_pd_release_internal()312 assert(pdd->refcnt > 0); in da1469x_pd_release_internal()
209 assert(CRG_TOP->SYS_STAT_REG & CRG_TOP_SYS_STAT_REG_TIM_IS_UP_Msk); in da1469x_clock_sys_xtal32m_configure()286 assert(idx >= 0); in da1469x_clock_sys_xtal32m_enable()299 assert(da1469x_clock_sys_xtal32m_switch_check_restrictions() == 0); in da1469x_clock_sys_xtal32m_switch()400 assert(da1469x_clock_is_xtal32m_settled()); in da1469x_clock_calibrate()406 assert(!(ANAMISC_BIF->CLK_REF_SEL_REG & ANAMISC_BIF_CLK_REF_SEL_REG_REF_CAL_START_Msk)); in da1469x_clock_calibrate()515 assert(g_mcu_clock_rcx_freq); in da1469x_clock_lp_rcx_freq_get()523 assert(g_mcu_clock_rc32k_freq); in da1469x_clock_lp_rc32k_freq_get()531 assert(g_mcu_clock_rc32m_freq); in da1469x_clock_lp_rc32m_freq_get()563 assert((CRG_TOP->POWER_CTRL_REG & CRG_TOP_POWER_CTRL_REG_VDD_LEVEL_Msk) in da1469x_clock_sys_pll_enable()646 assert(da1469x_clock_sys_pll_switch_check_restrictions() == 0); in da1469x_clock_sys_pll_switch()
45 assert(0); in da1469x_pdc_add()53 assert((idx >= 0) && (idx < MCU_PDC_CTRL_REGS_COUNT)); in da1469x_pdc_del()54 assert(MCU_PDC_CTRL_REGS(idx) & PDC_PDC_CTRL0_REG_PDC_MASTER_Msk); in da1469x_pdc_del()77 assert(mask); in da1469x_pdc_find()
84 assert((qspi_id->QSPIC_CTRLMODE_REG & QSPIC_QSPIC_CTRLMODE_REG_QSPIC_AUTO_MD_Msk) == 0); in qspi_write()98 assert((qspi_id->QSPIC_CTRLMODE_REG & QSPIC_QSPIC_CTRLMODE_REG_QSPIC_AUTO_MD_Msk) == 0); in qspi_transact()116 assert((qspi_id->QSPIC_CTRLMODE_REG & QSPIC_QSPIC_CTRLMODE_REG_QSPIC_AUTO_MD_Msk) == 0); in da1469x_qspi_set_bus_mode()138 assert((qspi_id->QSPIC_CTRLMODE_REG & QSPIC_QSPIC_CTRLMODE_REG_QSPIC_AUTO_MD_Msk) == 0); in da1469x_qspi_memory_jedec_reset()163 assert((qspi_id->QSPIC_CTRLMODE_REG & QSPIC_QSPIC_CTRLMODE_REG_QSPIC_AUTO_MD_Msk) == 0); in da1469x_qspi_memory_jedec_read_id()177 assert((qspi_id->QSPIC_CTRLMODE_REG & QSPIC_QSPIC_CTRLMODE_REG_QSPIC_AUTO_MD_Msk) == 0); in da1469x_qspi_enter_exit_qpi_mode()
56 assert(regs_buf); in da1469x_trimv_is_reg_pairs_in_otp()57 assert(status_buf); in da1469x_trimv_is_reg_pairs_in_otp()148 assert(g_mcu_trimv_groups[trimv_group].num_words == 0); in da1469x_trimv_init_from_otp()190 assert(rc == 0); in da1469x_trimv_group_read()
59 assert(remap_addr0 < REMAP_ADDR0_MAX); in black_orca_phy_addr()77 assert(addr < flash_region_size); in black_orca_phy_addr()81 assert(addr >= flash_region_base && addr < (flash_region_base + flash_region_size)); in black_orca_phy_addr()
171 assert(0); in da1469x_lcdc_stride_calculation()220 assert(0); in da1469x_lcdc_layer_configure()224 assert(0); in da1469x_lcdc_layer_configure()317 assert(0); in da1469x_lcdc_timings_configure()384 assert(0); in da1469x_lcdc_mipi_dbi_interface_configure()
76 assert(IS_OTP_ADDRESS(addr) || IS_OTP_P_ADDRESS(addr)); in da1469x_otp_address_to_cell_offset()78 assert(!(addr % 4)); in da1469x_otp_address_to_cell_offset()
62 assert(0); in da1469x_otp_tim1_adjust()
175 assert(ii->magic == 0xC3AC0001); in cmac_load_image()176 assert(ii->img_size == img_size); in cmac_load_image()177 assert(ii->ram_size <= ram_size); in cmac_load_image()
94 uint32_t assert; member
75 #define FSP_ASSERT(a) {assert(a);}
94 #define FSP_ASSERT(a) {assert(a);}
92 #define FSP_ASSERT(a) {assert(a);}
156 #define FSP_ASSERT(a) {assert(a);}
