| /hal_renesas-latest/drivers/ra/fsp/src/bsp/mcu/all/ |
| D | bsp_clocks.c | 902 …(FSP_STYPE3_REG32_READ(R_SYSTEM->SCKDIVCR, secure) & R_SYSTEM_SCKDIVCR_ICK_Msk) >> R_SYSTEM_SCKDIV… in SystemCoreClockUpdate()
1047 R_SYSTEM->SCKDIVCR = sckdivcr; in prv_clock_dividers_set()
1055 R_SYSTEM->SCKDIVCR = sckdivcr; in prv_clock_dividers_set()
1061 R_SYSTEM->SCKDIVCR = sckdivcr; in prv_clock_dividers_set()
1116 R_SYSTEM->SCKDIVCR = (sckdivcr & ~(R_SYSTEM_SCKDIVCR_ICK_Msk)) | in bsp_prv_clock_set()
1122 R_SYSTEM->SCKDIVCR = sckdivcr; in bsp_prv_clock_set()
1175 uint32_t current_sckdivcr = R_SYSTEM->SCKDIVCR; in bsp_prv_clock_set()
1192 R_SYSTEM->SCKDIVCR = (current_sckdivcr & ~(R_SYSTEM_SCKDIVCR_ICK_Msk)) | in bsp_prv_clock_set()
1252 (R_SYSTEM->SCKDIVCR & in bsp_prv_clock_prepare_pre_sleep()
1499 R_SYSTEM->SCKDIVCR = (BSP_PRV_STARTUP_SCKDIVCR & ~(R_SYSTEM_SCKDIVCR_ICK_Msk)) | in bsp_prv_clock_set_hard_reset()
[all …]
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| D | bsp_common.h | 361 uint32_t sckdivcr = FSP_STYPE3_REG32_READ(R_SYSTEM->SCKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SystemClockHzGet()
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| /hal_renesas-latest/zephyr/ra/portable/ |
| D | bsp_common.h | 363 uint32_t sckdivcr = FSP_STYPE3_REG32_READ(R_SYSTEM->SCKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SystemClockHzGet()
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| /hal_renesas-latest/drivers/ra/fsp/src/r_iic_master/ |
| D | r_iic_master.c | 823 volatile uint32_t sysdiccr = FSP_STYPE3_REG8_READ(R_SYSTEM->SCKDIVCR, BSP_CFG_CLOCKS_SECURE); in iic_master_run_hw_master()
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| /hal_renesas-latest/drivers/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/ |
| D | R7FA2L1AB.h | 10154 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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| D | R7FA2A1AB.h | 10416 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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| D | R7FA4E10D.h | 10013 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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| D | R7FA4W1AD.h | 10502 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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| D | R7FA4M1AB.h | 10666 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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| D | R7FA4M2AD.h | 11002 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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| D | R7FA4M3AF.h | 11002 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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| D | R7FA4E2B9.h | 11817 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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| D | R7FA6E10F.h | 11431 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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| D | R7FA6M1AD.h | 11198 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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| D | R7FA6E2BB.h | 12021 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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| D | R7FA6M4AF.h | 11765 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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| D | R7FA4L1BD.h | 14320 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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| D | R7FA6M2AF.h | 13179 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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| D | R7FA6M3AH.h | 15837 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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| D | R7FA6M5BH.h | 14027 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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| D | R7FA8T1AH.h | 13632 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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| D | R7FA8M1AH.h | 13667 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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| D | R7FA8D1BH.h | 15256 …__IOM uint32_t SCKDIVCR; /*!< (@ 0x00000020) System Clock Division Control Register … member
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