| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4m2/ |
| D | bsp_cfg.h | 32 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
33 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4m3/ |
| D | bsp_cfg.h | 32 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
33 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4w1/ |
| D | bsp_cfg.h | 32 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
33 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6e1/ |
| D | bsp_cfg.h | 31 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
32 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6e2/ |
| D | bsp_cfg.h | 31 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
32 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m1/ |
| D | bsp_cfg.h | 31 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
32 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m2/ |
| D | bsp_cfg.h | 31 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
32 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m3/ |
| D | bsp_cfg.h | 31 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
32 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4e1/ |
| D | bsp_cfg.h | 32 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
33 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4e2/ |
| D | bsp_cfg.h | 32 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
33 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4l1/ |
| D | bsp_cfg.h | 29 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
30 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra4m1/ |
| D | bsp_cfg.h | 32 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
33 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra2a1/ |
| D | bsp_cfg.h | 31 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
32 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra2l1/ |
| D | bsp_cfg.h | 31 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
32 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m4/ |
| D | bsp_cfg.h | 31 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
32 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra6m5/ |
| D | bsp_cfg.h | 31 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
32 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra8d1/ |
| D | bsp_cfg.h | 31 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
32 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra8m1/ |
| D | bsp_cfg.h | 31 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
32 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/zephyr/ra/ra_cfg/fsp_cfg/bsp/ra8t1/ |
| D | bsp_cfg.h | 31 #ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
32 #define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0)) macro
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| /hal_renesas-latest/drivers/ra/fsp/src/bsp/mcu/all/ |
| D | bsp_clocks.c | 77 #if (0 == BSP_CLOCK_CFG_SUBCLOCK_DRIVE)
79 #elif (1 == BSP_CLOCK_CFG_SUBCLOCK_DRIVE)
82 …#define BSP_PRV_SODRV (BSP_CLOCK_CFG_SUBCLOCK_DRIVE << R_SYSTEM_CMC_SODRV_…
2787 if (R_SYSTEM->SOSCCR || (BSP_CLOCK_CFG_SUBCLOCK_DRIVE != R_SYSTEM->SOMCR_b.SODRV))
2809 … ((BSP_CLOCK_CFG_SUBCLOCK_DRIVE << BSP_FEATURE_CGC_SODRV_SHIFT) & BSP_FEATURE_CGC_SODRV_MASK);
3000 if ((0U == R_SYSTEM->SOSCCR) && (BSP_CLOCK_CFG_SUBCLOCK_DRIVE == R_SYSTEM->SOMCR_b.SODRV))
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