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Searched refs:pllFllFrac (Results 1 – 17 of 17) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/boards/frdmk28fa/
Dclock_config.c163 … .pllFllFrac = 0, /* PLLFLLSEL clock divider fraction: multiplied by 1 */
254 … .pllFllFrac = 0, /* PLLFLLSEL clock divider fraction: multiplied by 1 */
362 … .pllFllFrac = 0, /* PLLFLLSEL clock divider fraction: multiplied by 1 */
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmk66f/
Dclock_config.c175 … .pllFllFrac = 0, /* PLLFLLSEL clock divider fraction: multiplied by 1 */
284 … .pllFllFrac = 0, /* PLLFLLSEL clock divider fraction: multiplied by 1 */
402 … .pllFllFrac = 0, /* PLLFLLSEL clock divider fraction: multiplied by 1 */
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW41Z4/drivers/
Dfsl_clock.h376 uint8_t pllFllFrac; /*!< PLLFLLSEL clock divider fraction. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MK26F18/drivers/
Dfsl_clock.h464 uint8_t pllFllFrac; /*!< PLLFLLSEL clock divider fraction. */ member
Dfsl_clock.c595 CLOCK_SetPllFllSelClock(config->pllFllSel, config->pllFllDiv, config->pllFllFrac); in CLOCK_SetSimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK28FA15/drivers/
Dfsl_clock.h474 uint8_t pllFllFrac; /*!< PLLFLLSEL clock divider fraction. */ member
Dfsl_clock.c590 CLOCK_SetPllFllSelClock(config->pllFllSel, config->pllFllDiv, config->pllFllFrac); in CLOCK_SetSimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK27FA15/drivers/
Dfsl_clock.h474 uint8_t pllFllFrac; /*!< PLLFLLSEL clock divider fraction. */ member
Dfsl_clock.c590 CLOCK_SetPllFllSelClock(config->pllFllSel, config->pllFllDiv, config->pllFllFrac); in CLOCK_SetSimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/drivers/
Dfsl_clock.h448 uint8_t pllFllFrac; /*!< PLLFLLSEL clock divider fraction. */ member
Dfsl_clock.c590 CLOCK_SetPllFllSelClock(config->pllFllSel, config->pllFllDiv, config->pllFllFrac); in CLOCK_SetSimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/drivers/
Dfsl_clock.h441 uint8_t pllFllFrac; /*!< PLLFLLSEL clock divider fraction. */ member
Dfsl_clock.c590 CLOCK_SetPllFllSelClock(config->pllFllSel, config->pllFllDiv, config->pllFllFrac); in CLOCK_SetSimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/drivers/
Dfsl_clock.h471 uint8_t pllFllFrac; /*!< PLLFLLSEL clock divider fraction. */ member
Dfsl_clock.c595 CLOCK_SetPllFllSelClock(config->pllFllSel, config->pllFllDiv, config->pllFllFrac); in CLOCK_SetSimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK66F18/drivers/
Dfsl_clock.h470 uint8_t pllFllFrac; /*!< PLLFLLSEL clock divider fraction. */ member
Dfsl_clock.c594 CLOCK_SetPllFllSelClock(config->pllFllSel, config->pllFllDiv, config->pllFllFrac); in CLOCK_SetSimConfig()