Searched refs:pllFllDiv (Results 1 – 17 of 17) sorted by relevance
| /hal_nxp-latest/mcux/mcux-sdk/boards/frdmk28fa/ |
| D | clock_config.c | 162 .pllFllDiv = 0, /* PLLFLLSEL clock divider divisor: divided by 1 */
253 .pllFllDiv = 0, /* PLLFLLSEL clock divider divisor: divided by 1 */
361 .pllFllDiv = 0, /* PLLFLLSEL clock divider divisor: divided by 1 */
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| /hal_nxp-latest/mcux/mcux-sdk/boards/frdmk66f/ |
| D | clock_config.c | 174 … .pllFllDiv = 0, /* PLLFLLSEL clock divider divisor: divided by 1 */
283 … .pllFllDiv = 0, /* PLLFLLSEL clock divider divisor: divided by 1 */
401 … .pllFllDiv = 0, /* PLLFLLSEL clock divider divisor: divided by 1 */
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKW41Z4/drivers/ |
| D | fsl_clock.h | 375 uint8_t pllFllDiv; /*!< PLLFLLSEL clock divider divisor. */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK26F18/drivers/ |
| D | fsl_clock.h | 463 uint8_t pllFllDiv; /*!< PLLFLLSEL clock divider divisor. */ member
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| D | fsl_clock.c | 595 CLOCK_SetPllFllSelClock(config->pllFllSel, config->pllFllDiv, config->pllFllFrac); in CLOCK_SetSimConfig()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK28FA15/drivers/ |
| D | fsl_clock.h | 473 uint8_t pllFllDiv; /*!< PLLFLLSEL clock divider divisor. */ member
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| D | fsl_clock.c | 590 CLOCK_SetPllFllSelClock(config->pllFllSel, config->pllFllDiv, config->pllFllFrac); in CLOCK_SetSimConfig()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK27FA15/drivers/ |
| D | fsl_clock.h | 473 uint8_t pllFllDiv; /*!< PLLFLLSEL clock divider divisor. */ member
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| D | fsl_clock.c | 590 CLOCK_SetPllFllSelClock(config->pllFllSel, config->pllFllDiv, config->pllFllFrac); in CLOCK_SetSimConfig()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/drivers/ |
| D | fsl_clock.h | 447 uint8_t pllFllDiv; /*!< PLLFLLSEL clock divider divisor. */ member
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| D | fsl_clock.c | 590 CLOCK_SetPllFllSelClock(config->pllFllSel, config->pllFllDiv, config->pllFllFrac); in CLOCK_SetSimConfig()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/drivers/ |
| D | fsl_clock.h | 440 uint8_t pllFllDiv; /*!< PLLFLLSEL clock divider divisor. */ member
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| D | fsl_clock.c | 590 CLOCK_SetPllFllSelClock(config->pllFllSel, config->pllFllDiv, config->pllFllFrac); in CLOCK_SetSimConfig()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/drivers/ |
| D | fsl_clock.h | 470 uint8_t pllFllDiv; /*!< PLLFLLSEL clock divider divisor. */ member
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| D | fsl_clock.c | 595 CLOCK_SetPllFllSelClock(config->pllFllSel, config->pllFllDiv, config->pllFllFrac); in CLOCK_SetSimConfig()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK66F18/drivers/ |
| D | fsl_clock.h | 469 uint8_t pllFllDiv; /*!< PLLFLLSEL clock divider divisor. */ member
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| D | fsl_clock.c | 594 CLOCK_SetPllFllSelClock(config->pllFllSel, config->pllFllDiv, config->pllFllFrac); in CLOCK_SetSimConfig()
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