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Searched refs:phyAddr (Results 1 – 25 of 35) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/components/phyksz8081/
Dfsl_phy.c30 status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz) in PHY_Init() argument
49 (void)PHY_Read(base, phyAddr, PHY_ID1_REG, &idReg); in PHY_Init()
60 result = PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK); in PHY_Init()
65 result = PHY_Read(base, phyAddr, PHY_CONTROL2_REG, &data); in PHY_Init()
70 result = PHY_Write(base, phyAddr, PHY_CONTROL2_REG, (data | PHY_CTL2_REFCLK_SELECT_MASK)); in PHY_Init()
78 result = PHY_Write(base, phyAddr, PHY_AUTONEG_ADVERTISE_REG, in PHY_Init()
84 …PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, (PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUTONEG_M… in PHY_Init()
90 result = PHY_Read(base, phyAddr, PHY_BASICSTATUS_REG, &bssReg); in PHY_Init()
93 (void)PHY_Read(base, phyAddr, PHY_CONTROL1_REG, &ctlReg); in PHY_Init()
117 status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data) in PHY_Write() argument
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Dfsl_phy.h124 status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz);
137 status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data);
150 status_t PHY_Read(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t *dataPtr);
165 status_t PHY_EnableLoopback(ENET_Type *base, uint32_t phyAddr, phy_loop_t mode, phy_speed_t speed, …
178 status_t PHY_GetLinkStatus(ENET_Type *base, uint32_t phyAddr, bool *status);
190 status_t PHY_GetLinkSpeedDuplex(ENET_Type *base, uint32_t phyAddr, phy_speed_t *speed, phy_duplex_t…
/hal_nxp-latest/mcux/mcux-sdk/components/phylan8720a/
Dfsl_phy.c30 status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz) in PHY_Init() argument
51 (void)PHY_Read(base, phyAddr, PHY_ID1_REG, &idReg); in PHY_Init()
62 (void)PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK); in PHY_Init()
65 (void)PHY_Read(base, phyAddr, PHY_BASICCONTROL_REG, &reg); in PHY_Init()
74 (void)PHY_Write(base, phyAddr, PHY_AUTONEG_ADVERTISE_REG, (PHY_ALL_CAPABLE_MASK | 0x1U)); in PHY_Init()
77 …(void)PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, (PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUT… in PHY_Init()
81 (void)PHY_Read(base, phyAddr, PHY_SEPCIAL_CONTROL_REG, &reg); in PHY_Init()
94 (void)PHY_GetLinkStatus(base, phyAddr, &status); in PHY_Init()
104 status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data) in PHY_Write() argument
113 ENET_StartSMIWrite(base, phyAddr, phyReg, kENET_MiiWriteValidFrame, data); in PHY_Write()
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Dfsl_phy.h103 status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz);
116 status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data);
129 status_t PHY_Read(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t *dataPtr);
142 status_t PHY_GetLinkStatus(ENET_Type *base, uint32_t phyAddr, bool *status);
154 status_t PHY_GetLinkSpeedDuplex(ENET_Type *base, uint32_t phyAddr, phy_speed_t *speed, phy_duplex_t…
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phydp83848/
Dfsl_phydp83848.c58 handle->phyAddr = config->phyAddr; in PHY_DP83848_Init()
63 result = MDIO_Read(handle->mdioHandle, handle->phyAddr, PHY_ID1_REG, &regValue); in PHY_DP83848_Init()
77 …result = MDIO_Write(handle->mdioHandle, handle->phyAddr, PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK… in PHY_DP83848_Init()
84 MDIO_Write(handle->mdioHandle, handle->phyAddr, PHY_AUTONEG_ADVERTISE_REG, in PHY_DP83848_Init()
89 result = MDIO_Write(handle->mdioHandle, handle->phyAddr, PHY_BASICCONTROL_REG, in PHY_DP83848_Init()
99 … result = MDIO_Read(handle->mdioHandle, handle->phyAddr, PHY_BASICCONTROL_REG, &regValue); in PHY_DP83848_Init()
105 … result = MDIO_Write(handle->mdioHandle, handle->phyAddr, PHY_BASICCONTROL_REG, regValue); in PHY_DP83848_Init()
121 return MDIO_Write(handle->mdioHandle, handle->phyAddr, phyReg, data); in PHY_DP83848_Write()
126 return MDIO_Read(handle->mdioHandle, handle->phyAddr, phyReg, pData); in PHY_DP83848_Read()
139 result = MDIO_Read(handle->mdioHandle, handle->phyAddr, PHY_BASICSTATUS_REG, &regValue); in PHY_DP83848_GetAutoNegotiationStatus()
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/hal_nxp-latest/mcux/mcux-sdk/components/phy/mdio/enet/
Dfsl_enet_mdio.c19 static status_t ENET_MDIO_Write(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32_t…
20 static status_t ENET_MDIO_Read(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32_t …
22 static status_t ENET_MDIO_WriteExt(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint3…
23 static status_t ENET_MDIO_ReadExt(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32…
63 static status_t ENET_MDIO_Write(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32_t… in ENET_MDIO_Write() argument
73 ENET_StartSMIWrite(base, phyAddr, devAddr, kENET_MiiWriteValidFrame, data); in ENET_MDIO_Write()
87 static status_t ENET_MDIO_Read(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32_t … in ENET_MDIO_Read() argument
99 ENET_StartSMIRead(base, phyAddr, devAddr, kENET_MiiReadValidFrame); in ENET_MDIO_Read()
117 static status_t ENET_MDIO_WriteExt(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint3… in ENET_MDIO_WriteExt() argument
125 ENET_StartExtC45SMIWriteReg(base, phyAddr, devAddr); in ENET_MDIO_WriteExt()
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/hal_nxp-latest/mcux/mcux-sdk/components/phy/
Dfsl_mdio.h48 uint32_t phyAddr,
52 uint32_t phyAddr,
56 uint32_t phyAddr,
60 uint32_t phyAddr,
101 static inline status_t MDIO_Write(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32… in MDIO_Write() argument
103 return handle->ops->mdioWrite(handle, phyAddr, devAddr, data); in MDIO_Write()
117 static inline status_t MDIO_Read(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32_… in MDIO_Read() argument
119 return handle->ops->mdioRead(handle, phyAddr, devAddr, dataPtr); in MDIO_Read()
Dfsl_phy.h85 typedef status_t (*mdioWrite)(uint8_t phyAddr, uint8_t regAddr, uint16_t data);
88 typedef status_t (*mdioRead)(uint8_t phyAddr, uint8_t regAddr, uint16_t *pData);
159 uint8_t phyAddr; /*!< PHY address. */ member
172 uint8_t phyAddr; /*!< PHY address. */ member
/hal_nxp-latest/mcux/mcux-sdk/drivers/netc/
Dfsl_netc_mdio.c96 static status_t NETC_PEMDIO_Write(netc_mdio_hw_t *base, uint8_t phyAddr, uint8_t regAddr, uint16_t … in NETC_PEMDIO_Write() argument
101 …base->EMDIO_CTL = ENETC_PF_EMDIO_EMDIO_CTL_PORT_ADDR(phyAddr) | ENETC_PF_EMDIO_EMDIO_CTL_DEV_ADDR… in NETC_PEMDIO_Write()
116 static status_t NETC_PEMDIO_Read(netc_mdio_hw_t *base, uint8_t phyAddr, uint8_t regAddr, uint16_t *… in NETC_PEMDIO_Read() argument
121 …ase->EMDIO_CTL = ENETC_PF_EMDIO_EMDIO_CTL_READ_MASK | ENETC_PF_EMDIO_EMDIO_CTL_PORT_ADDR(phyAddr) | in NETC_PEMDIO_Read()
233 static void NETC_PIMDIO_Write(NETC_ETH_LINK_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t … in NETC_PIMDIO_Write() argument
236 …base->PM0_MDIO_CTL = NETC_ETH_LINK_PM0_MDIO_CTL_PORT_ADDR(phyAddr) | NETC_ETH_LINK_PM0_MDIO_CTL_D… in NETC_PIMDIO_Write()
243 static void NETC_PIMDIO_Read(NETC_ETH_LINK_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t *… in NETC_PIMDIO_Read() argument
246 …0_MDIO_CTL = NETC_ETH_LINK_PM0_MDIO_CTL_READ_MASK | NETC_ETH_LINK_PM0_MDIO_CTL_PORT_ADDR(phyAddr) | in NETC_PIMDIO_Read()
363 status_t NETC_MDIOWrite(netc_mdio_handle_t *handle, uint8_t phyAddr, uint8_t regAddr, uint16_t data) in NETC_MDIOWrite() argument
370 NETC_PIMDIO_Write(base, phyAddr, regAddr, data); in NETC_MDIOWrite()
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/hal_nxp-latest/mcux/mcux-sdk/components/phy/mdio/enet_qos/
Dfsl_enet_qos_mdio.c20 static status_t ENET_QOS_MDIO_Write(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint…
22 static status_t ENET_QOS_MDIO_Read(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint3…
51 static status_t ENET_QOS_MDIO_Write(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint… in ENET_QOS_MDIO_Write() argument
60 ENET_QOS_StartSMIWrite(base, phyAddr, devAddr, data); in ENET_QOS_MDIO_Write()
83 static status_t ENET_QOS_MDIO_Read(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint3… in ENET_QOS_MDIO_Read() argument
92 ENET_QOS_StartSMIRead(base, phyAddr, devAddr); in ENET_QOS_MDIO_Read()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/mdio/lpc_enet/
Dfsl_enet_mdio.c20 static status_t ENET_MDIO_Write(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32_t…
22 static status_t ENET_MDIO_Read(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32_t …
51 static status_t ENET_MDIO_Write(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32_t… in ENET_MDIO_Write() argument
60 ENET_StartSMIWrite(base, phyAddr, devAddr, data); in ENET_MDIO_Write()
83 static status_t ENET_MDIO_Read(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32_t … in ENET_MDIO_Read() argument
94 ENET_StartSMIRead(base, phyAddr, devAddr); in ENET_MDIO_Read()
/hal_nxp-latest/mcux/mcux-sdk/drivers/netc/socs/imxrt1180/
Dfsl_netc_soc.c178 status_t NETC_SocSetLinkAddr(netc_soc_link_t link, uint8_t phyAddr) in NETC_SocSetLinkAddr() argument
185 NETC_IERB->L0BCR = NETC_IERB_L0BCR_MDIO_PHYAD_PRTAD(phyAddr); in NETC_SocSetLinkAddr()
188 NETC_IERB->L1BCR = NETC_IERB_L1BCR_MDIO_PHYAD_PRTAD(phyAddr); in NETC_SocSetLinkAddr()
191 NETC_IERB->L2BCR = NETC_IERB_L2BCR_MDIO_PHYAD_PRTAD(phyAddr); in NETC_SocSetLinkAddr()
194 NETC_IERB->L3BCR = NETC_IERB_L3BCR_MDIO_PHYAD_PRTAD(phyAddr); in NETC_SocSetLinkAddr()
197 NETC_IERB->L4BCR = NETC_IERB_L4BCR_MDIO_PHYAD_PRTAD(phyAddr); in NETC_SocSetLinkAddr()
/hal_nxp-latest/mcux/mcux-sdk/platform/drivers/netc/socs/imxrt1180/
Dfsl_netc_soc.c178 status_t NETC_SocSetLinkAddr(netc_soc_link_t link, uint8_t phyAddr) in NETC_SocSetLinkAddr() argument
185 NETC_IERB->L0BCR = NETC_IERB_L0BCR_MDIO_PHYAD_PRTAD(phyAddr); in NETC_SocSetLinkAddr()
188 NETC_IERB->L1BCR = NETC_IERB_L1BCR_MDIO_PHYAD_PRTAD(phyAddr); in NETC_SocSetLinkAddr()
191 NETC_IERB->L2BCR = NETC_IERB_L2BCR_MDIO_PHYAD_PRTAD(phyAddr); in NETC_SocSetLinkAddr()
194 NETC_IERB->L3BCR = NETC_IERB_L3BCR_MDIO_PHYAD_PRTAD(phyAddr); in NETC_SocSetLinkAddr()
197 NETC_IERB->L4BCR = NETC_IERB_L4BCR_MDIO_PHYAD_PRTAD(phyAddr); in NETC_SocSetLinkAddr()
/hal_nxp-latest/mcux/mcux-sdk/cmsis_drivers/enet/
Dfsl_enet_phy_cmsis.c119 phyConfig.phyAddr = ENETPHY0_State.resource->phyAddr; in PHY0_PowerControl()
191 phyConfig.phyAddr = ENETPHY0_State.resource->phyAddr; in PHY0_SetMode()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyksz8041/
Dfsl_phyksz8041.c33 ((phy_ksz8041_resource_t *)(handle)->resource)->write((handle)->phyAddr, regAddr, data)
35 ((phy_ksz8041_resource_t *)(handle)->resource)->read((handle)->phyAddr, regAddr, pData)
65 handle->phyAddr = config->phyAddr; in PHY_KSZ8041_Init()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phylan8720a/
Dfsl_phylan8720a.c39 ((phy_lan8720a_resource_t *)(handle)->resource)->write((handle)->phyAddr, regAddr, data)
41 ((phy_lan8720a_resource_t *)(handle)->resource)->read((handle)->phyAddr, regAddr, pData)
71 handle->phyAddr = config->phyAddr; in PHY_LAN8720A_Init()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phylan8741/
Dfsl_phylan8741.c40 ((phy_lan8741_resource_t *)(handle)->resource)->write((handle)->phyAddr, regAddr, data)
42 ((phy_lan8741_resource_t *)(handle)->resource)->read((handle)->phyAddr, regAddr, pData)
73 handle->phyAddr = config->phyAddr; in PHY_LAN8741_Init()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyksz8081/
Dfsl_phyksz8081.c43 (((phy_ksz8081_resource_t *)(handle)->resource)->write((handle)->phyAddr, regAddr, data))
45 (((phy_ksz8081_resource_t *)(handle)->resource)->read((handle)->phyAddr, regAddr, pData))
76 handle->phyAddr = config->phyAddr; in PHY_KSZ8081_Init()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyvsc8541/
Dfsl_phyvsc8541.c38 ((phy_vsc8541_resource_t *)(handle)->resource)->write((handle)->phyAddr, regAddr, data)
40 ((phy_vsc8541_resource_t *)(handle)->resource)->read((handle)->phyAddr, regAddr, pData)
81 handle->phyAddr = config->phyAddr; in PHY_VSC8541_Init()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyaqr113c/
Dfsl_phyaqr113c.c120 ((phy_aqr113c_resource_t *)(handle)->resource)->write((handle)->phyAddr, devAddr, regAddr, data)
122 ((phy_aqr113c_resource_t *)(handle)->resource)->read((handle)->phyAddr, devAddr, regAddr, pData)
153 handle->phyAddr = config->phyAddr; in PHY_AQR113C_Init()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyrtl8201/
Dfsl_phyrtl8201.c31 ((phy_rtl8201_resource_t *)(handle)->resource)->write((handle)->phyAddr, regAddr, data)
33 ((phy_rtl8201_resource_t *)(handle)->resource)->read((handle)->phyAddr, regAddr, pData)
76 handle->phyAddr = config->phyAddr; in PHY_RTL8201_Init()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyrtl8211f/
Dfsl_phyrtl8211f.c63 ((phy_rtl8211f_resource_t *)(handle)->resource)->write((handle)->phyAddr, regAddr, data)
65 ((phy_rtl8211f_resource_t *)(handle)->resource)->read((handle)->phyAddr, regAddr, pData)
106 handle->phyAddr = config->phyAddr; in PHY_RTL8211F_Init()
/hal_nxp-latest/mcux/mcux-sdk/components/phy/device/phyar8031/
Dfsl_phyar8031.c72 ((phy_ar8031_resource_t *)(handle)->resource)->write((handle)->phyAddr, regAddr, data)
74 ((phy_ar8031_resource_t *)(handle)->resource)->read((handle)->phyAddr, regAddr, pData)
112 handle->phyAddr = config->phyAddr; in PHY_AR8031_Init()
/hal_nxp-latest/mcux/mcux-sdk/drivers/enet/
Dfsl_enet.h1000 ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, enet_mii_write_t operation, uint16_t data) in ENET_StartSMIWrite() argument
1002 …base->MMFR = ENET_MMFR_ST(1U) | ENET_MMFR_OP(operation) | ENET_MMFR_PA(phyAddr) | ENET_MMFR_RA(reg… in ENET_StartSMIWrite()
1018 static inline void ENET_StartSMIRead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, enet_mii_re… in ENET_StartSMIRead() argument
1021 …ENET_MMFR_ST(1U) | ENET_MMFR_OP(operation) | ENET_MMFR_PA(phyAddr) | ENET_MMFR_RA(regAddr) | ENET_… in ENET_StartSMIRead()
1034 status_t ENET_MDIOWrite(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t data);
1046 status_t ENET_MDIORead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t *pData);
/hal_nxp-latest/mcux/mcux-sdk/drivers/lpc_enet/
Dfsl_enet.h756 void ENET_StartSMIWrite(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t data);
765 void ENET_StartSMIRead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr);
777 status_t ENET_MDIOWrite(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t data);
789 status_t ENET_MDIORead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t *pData);

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