Lines Matching refs:phyAddr

30 status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz)  in PHY_Init()  argument
51 (void)PHY_Read(base, phyAddr, PHY_ID1_REG, &idReg); in PHY_Init()
62 (void)PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK); in PHY_Init()
65 (void)PHY_Read(base, phyAddr, PHY_BASICCONTROL_REG, &reg); in PHY_Init()
74 (void)PHY_Write(base, phyAddr, PHY_AUTONEG_ADVERTISE_REG, (PHY_ALL_CAPABLE_MASK | 0x1U)); in PHY_Init()
77 …(void)PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, (PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUT… in PHY_Init()
81 (void)PHY_Read(base, phyAddr, PHY_SEPCIAL_CONTROL_REG, &reg); in PHY_Init()
94 (void)PHY_GetLinkStatus(base, phyAddr, &status); in PHY_Init()
104 status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data) in PHY_Write() argument
113 ENET_StartSMIWrite(base, phyAddr, phyReg, kENET_MiiWriteValidFrame, data); in PHY_Write()
134 ENET_StartSMIWrite(base, phyAddr, phyReg, data); in PHY_Write()
142 status_t PHY_Read(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t *dataPtr) in PHY_Read() argument
153 ENET_StartSMIRead(base, phyAddr, phyReg, kENET_MiiReadValidFrame); in PHY_Read()
176 ENET_StartSMIRead(base, phyAddr, phyReg); in PHY_Read()
185 status_t PHY_GetLinkStatus(ENET_Type *base, uint32_t phyAddr, bool *status) in PHY_GetLinkStatus() argument
191 result = PHY_Read(base, phyAddr, PHY_BASICSTATUS_REG, &reg); in PHY_GetLinkStatus()
207 status_t PHY_GetLinkSpeedDuplex(ENET_Type *base, uint32_t phyAddr, phy_speed_t *speed, phy_duplex_t… in PHY_GetLinkSpeedDuplex() argument
216 result = PHY_Read(base, phyAddr, PHY_SEPCIAL_CONTROL_REG, &reg); in PHY_GetLinkSpeedDuplex()