| /hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1160/ |
| D | clock_config.c | 313 rootCfg.div = 1; in BOARD_BootClockRUN()
317 rootCfg.div = 1; in BOARD_BootClockRUN()
323 rootCfg.div = 1; in BOARD_BootClockRUN()
327 rootCfg.div = 1; in BOARD_BootClockRUN()
386 rootCfg.div = 1; in BOARD_BootClockRUN()
393 rootCfg.div = 2; in BOARD_BootClockRUN()
399 rootCfg.div = 2; in BOARD_BootClockRUN()
404 rootCfg.div = 4; in BOARD_BootClockRUN()
410 rootCfg.div = 3; in BOARD_BootClockRUN()
422 rootCfg.div = 1; in BOARD_BootClockRUN()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1170/ |
| D | clock_config.c | 361 rootCfg.div = 1; in BOARD_BootClockRUN()
365 rootCfg.div = 1; in BOARD_BootClockRUN()
371 rootCfg.div = 1; in BOARD_BootClockRUN()
375 rootCfg.div = 1; in BOARD_BootClockRUN()
434 rootCfg.div = 1; in BOARD_BootClockRUN()
441 rootCfg.div = 1; in BOARD_BootClockRUN()
447 rootCfg.div = 2; in BOARD_BootClockRUN()
452 rootCfg.div = 3; in BOARD_BootClockRUN()
458 rootCfg.div = 3; in BOARD_BootClockRUN()
470 rootCfg.div = 1; in BOARD_BootClockRUN()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/boards/evkbmimxrt1170/ |
| D | clock_config.c | 361 rootCfg.div = 1; in BOARD_BootClockRUN()
365 rootCfg.div = 1; in BOARD_BootClockRUN()
371 rootCfg.div = 1; in BOARD_BootClockRUN()
375 rootCfg.div = 1; in BOARD_BootClockRUN()
434 rootCfg.div = 1; in BOARD_BootClockRUN()
441 rootCfg.div = 1; in BOARD_BootClockRUN()
447 rootCfg.div = 2; in BOARD_BootClockRUN()
452 rootCfg.div = 3; in BOARD_BootClockRUN()
458 rootCfg.div = 3; in BOARD_BootClockRUN()
470 rootCfg.div = 1; in BOARD_BootClockRUN()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1180/ |
| D | clock_config.c | 77 __attribute__((weak)) void EdgeLock_SetClock(uint8_t mux, uint8_t div) in EdgeLock_SetClock() argument
402 rootCfg.div = 1; in BOARD_BootClockRUN()
411 rootCfg.div = 2; in BOARD_BootClockRUN()
483 rootCfg.div = 1; in BOARD_BootClockRUN()
490 rootCfg.div = 2; in BOARD_BootClockRUN()
499 rootCfg.div = 4; in BOARD_BootClockRUN()
504 rootCfg.div = 4; in BOARD_BootClockRUN()
509 rootCfg.div = 2; in BOARD_BootClockRUN()
514 rootCfg.div = 3; in BOARD_BootClockRUN()
520 rootCfg.div = 240; in BOARD_BootClockRUN()
[all …]
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| /hal_nxp-latest/imx/drivers/ |
| D | ecspi.c | 98 uint32_t div, pre_div; in ECSPI_SetBaudRate() local
109 div = sourceClockInHz / bitsPerSec; in ECSPI_SetBaudRate()
110 if(div < 16) /* pre_divider is enough */ in ECSPI_SetBaudRate()
112 if((sourceClockInHz - bitsPerSec * div) < ((bitsPerSec * (div + 1)) - sourceClockInHz)) in ECSPI_SetBaudRate()
113 pre_div = div - 1; /* pre_divider value is one less than the real divider */ in ECSPI_SetBaudRate()
115 pre_div = div; in ECSPI_SetBaudRate()
124 for(div = 1; div < 16; div++) in ECSPI_SetBaudRate()
126 post_baud = sourceClockInHz >> div; in ECSPI_SetBaudRate()
131 if(div == 16) /* divider is not enough, set the biggest ones */ in ECSPI_SetBaudRate()
146 ECSPI_CONREG_POST_DIVIDER(div); in ECSPI_SetBaudRate()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/drivers/ |
| D | fsl_clock.c | 789 uint32_t div; in CLOCK_GetClkDiv() local
796 div = 0U; in CLOCK_GetClkDiv()
800 div = (uint32_t)((((volatile uint32_t *)pClkDiv)[(uint32_t)div_name] & 0xFFU) + 1U); in CLOCK_GetClkDiv()
803 return div; in CLOCK_GetClkDiv()
987 uint32_t div = 0U; in CLOCK_GetAdcClkFreq() local
1014 div = ((id == 0U) ? ((SYSCON->ADC0CLKDIV & SYSCON_ADC0CLKDIV_DIV_MASK) + 1U) : in CLOCK_GetAdcClkFreq()
1017 return freq / div; in CLOCK_GetAdcClkFreq()
1366 uint32_t div = 0U; in CLOCK_GetI3cClkFreq() local
1389 div = ((id == 0U) ? ((SYSCON->I3C0FCLKDIV & SYSCON_I3C0FCLKDIV_DIV_MASK) + 1U) : in CLOCK_GetI3cClkFreq()
1392 return freq / div; in CLOCK_GetI3cClkFreq()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/drivers/ |
| D | fsl_clock.c | 789 uint32_t div; in CLOCK_GetClkDiv() local
796 div = 0U; in CLOCK_GetClkDiv()
800 div = (uint32_t)((((volatile uint32_t *)pClkDiv)[(uint32_t)div_name] & 0xFFU) + 1U); in CLOCK_GetClkDiv()
803 return div; in CLOCK_GetClkDiv()
987 uint32_t div = 0U; in CLOCK_GetAdcClkFreq() local
1014 div = ((id == 0U) ? ((SYSCON->ADC0CLKDIV & SYSCON_ADC0CLKDIV_DIV_MASK) + 1U) : in CLOCK_GetAdcClkFreq()
1017 return freq / div; in CLOCK_GetAdcClkFreq()
1366 uint32_t div = 0U; in CLOCK_GetI3cClkFreq() local
1389 div = ((id == 0U) ? ((SYSCON->I3C0FCLKDIV & SYSCON_I3C0FCLKDIV_DIV_MASK) + 1U) : in CLOCK_GetI3cClkFreq()
1392 return freq / div; in CLOCK_GetI3cClkFreq()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/drivers/ |
| D | fsl_clock.c | 789 uint32_t div; in CLOCK_GetClkDiv() local
796 div = 0U; in CLOCK_GetClkDiv()
800 div = (uint32_t)((((volatile uint32_t *)pClkDiv)[(uint32_t)div_name] & 0xFFU) + 1U); in CLOCK_GetClkDiv()
803 return div; in CLOCK_GetClkDiv()
987 uint32_t div = 0U; in CLOCK_GetAdcClkFreq() local
1014 div = ((id == 0U) ? ((SYSCON->ADC0CLKDIV & SYSCON_ADC0CLKDIV_DIV_MASK) + 1U) : in CLOCK_GetAdcClkFreq()
1017 return freq / div; in CLOCK_GetAdcClkFreq()
1366 uint32_t div = 0U; in CLOCK_GetI3cClkFreq() local
1389 div = ((id == 0U) ? ((SYSCON->I3C0FCLKDIV & SYSCON_I3C0FCLKDIV_DIV_MASK) + 1U) : in CLOCK_GetI3cClkFreq()
1392 return freq / div; in CLOCK_GetI3cClkFreq()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/drivers/ |
| D | fsl_clock.c | 789 uint32_t div; in CLOCK_GetClkDiv() local
796 div = 0U; in CLOCK_GetClkDiv()
800 div = (uint32_t)((((volatile uint32_t *)pClkDiv)[(uint32_t)div_name] & 0xFFU) + 1U); in CLOCK_GetClkDiv()
803 return div; in CLOCK_GetClkDiv()
987 uint32_t div = 0U; in CLOCK_GetAdcClkFreq() local
1014 div = ((id == 0U) ? ((SYSCON->ADC0CLKDIV & SYSCON_ADC0CLKDIV_DIV_MASK) + 1U) : in CLOCK_GetAdcClkFreq()
1017 return freq / div; in CLOCK_GetAdcClkFreq()
1366 uint32_t div = 0U; in CLOCK_GetI3cClkFreq() local
1389 div = ((id == 0U) ? ((SYSCON->I3C0FCLKDIV & SYSCON_I3C0FCLKDIV_DIV_MASK) + 1U) : in CLOCK_GetI3cClkFreq()
1392 return freq / div; in CLOCK_GetI3cClkFreq()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/drivers/ |
| D | fsl_clock.c | 773 uint32_t div; in CLOCK_GetClkDiv() local
780 div = 0U; in CLOCK_GetClkDiv()
784 div = (uint32_t)((((volatile uint32_t *)pClkDiv)[(uint32_t)div_name] & 0xFFU) + 1U); in CLOCK_GetClkDiv()
787 return div; in CLOCK_GetClkDiv()
965 uint32_t div = 0U; in CLOCK_GetAdcClkFreq() local
992 div = ((id == 0U) ? ((SYSCON->ADC0CLKDIV & SYSCON_ADC0CLKDIV_DIV_MASK) + 1U) : in CLOCK_GetAdcClkFreq()
995 return freq / div; in CLOCK_GetAdcClkFreq()
1148 uint32_t div = 0U; in CLOCK_GetI3cClkFreq() local
1171 div = ((id == 0U) ? ((SYSCON->I3C0FCLKDIV & SYSCON_I3C0FCLKDIV_DIV_MASK) + 1U) : in CLOCK_GetI3cClkFreq()
1174 return freq / div; in CLOCK_GetI3cClkFreq()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/drivers/ |
| D | fsl_clock.c | 773 uint32_t div; in CLOCK_GetClkDiv() local
780 div = 0U; in CLOCK_GetClkDiv()
784 div = (uint32_t)((((volatile uint32_t *)pClkDiv)[(uint32_t)div_name] & 0xFFU) + 1U); in CLOCK_GetClkDiv()
787 return div; in CLOCK_GetClkDiv()
965 uint32_t div = 0U; in CLOCK_GetAdcClkFreq() local
992 div = ((id == 0U) ? ((SYSCON->ADC0CLKDIV & SYSCON_ADC0CLKDIV_DIV_MASK) + 1U) : in CLOCK_GetAdcClkFreq()
995 return freq / div; in CLOCK_GetAdcClkFreq()
1148 uint32_t div = 0U; in CLOCK_GetI3cClkFreq() local
1171 div = ((id == 0U) ? ((SYSCON->I3C0FCLKDIV & SYSCON_I3C0FCLKDIV_DIV_MASK) + 1U) : in CLOCK_GetI3cClkFreq()
1174 return freq / div; in CLOCK_GetI3cClkFreq()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/flexspi_flr/ |
| D | fsl_flexspi_flr.c | 157 rootCfg.div = 8; in FLEXSPI_SLV_ClkRootFrq()
163 rootCfg.div = 8; in FLEXSPI_SLV_ClkRootFrq()
169 rootCfg.div = 5; in FLEXSPI_SLV_ClkRootFrq()
175 rootCfg.div = 4; in FLEXSPI_SLV_ClkRootFrq()
181 rootCfg.div = 6; in FLEXSPI_SLV_ClkRootFrq()
187 rootCfg.div = 5; in FLEXSPI_SLV_ClkRootFrq()
193 rootCfg.div = 1; in FLEXSPI_SLV_ClkRootFrq()
199 rootCfg.div = 4; in FLEXSPI_SLV_ClkRootFrq()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/netc/ |
| D | fsl_netc_mdio.c | 46 uint32_t div; in NETC_PEMDIO_Init() local
49 div = mdioConfig->srcClockHz / NETC_MDC_FREQUENCY / 2U; in NETC_PEMDIO_Init()
50 if (div > NETC_MDIO_CLK_MAX_DIV_FIELD) in NETC_PEMDIO_Init()
73 …PF_EMDIO_EMDIO_CFG_NEG(mdioConfig->isNegativeDriven) | ENETC_PF_EMDIO_EMDIO_CFG_MDIO_CLK_DIV(div) | in NETC_PEMDIO_Init()
199 uint32_t div; in NETC_PIMDIO_Init() local
202 div = mdioConfig->srcClockHz / NETC_MDC_FREQUENCY / 2U; in NETC_PIMDIO_Init()
203 if (div > NETC_MDIO_CLK_MAX_DIV_FIELD) in NETC_PIMDIO_Init()
221 base->PM0_MDIO_CFG = NETC_ETH_LINK_PM0_MDIO_CFG_MDIO_CLK_DIV(div) | in NETC_PIMDIO_Init()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/i3c/ |
| D | fsl_i3c.c | 1096 uint32_t div, freq; in I3C_MasterSetBaudRate() local
1112 div = freq / i3cPPBaud_HZ; in I3C_MasterSetBaudRate()
1113 div = (div == 0UL) ? 1UL : div; in I3C_MasterSetBaudRate()
1114 if (freq / div > i3cPPBaudMax_HZ) in I3C_MasterSetBaudRate()
1116 div++; in I3C_MasterSetBaudRate()
1118 assert(div <= FSL_I3C_PPBAUD_DIV_MAX); in I3C_MasterSetBaudRate()
1119 ppBaud = div - 1UL; in I3C_MasterSetBaudRate()
1120 freq /= div; in I3C_MasterSetBaudRate()
1128 div = (2UL * freq) / i3cODBaud_HZ; in I3C_MasterSetBaudRate()
1129 div = div < 2UL ? 2UL : div; in I3C_MasterSetBaudRate()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/mipi_dsi_imx/ |
| D | fsl_mipi_dsi.c | 78 static uint16_t DSI_CheckAndUpdatePixCycle(uint16_t cycle, uint8_t bpp, uint8_t div);
161 static uint16_t DSI_CheckAndUpdatePixCycle(uint16_t cycle, uint8_t bpp, uint8_t div) in DSI_CheckAndUpdatePixCycle() argument
164 for (uint8_t i = 0U; i < div; i++) in DSI_CheckAndUpdatePixCycle()
168 if ((((cycle + (uint16_t)i) * (uint16_t)bpp) % div) == 0U) in DSI_CheckAndUpdatePixCycle()
180 uint8_t div = 8U * laneNum; in DSI_ConfigureHorizontalParams() local
183 base->VID_HSA_TIME = (uint32_t)DSI_CheckAndUpdatePixCycle(config->hsw, bpp, div); in DSI_ConfigureHorizontalParams()
184 base->VID_HBP_TIME = (uint32_t)DSI_CheckAndUpdatePixCycle(config->hbp, bpp, div); in DSI_ConfigureHorizontalParams()
186 (config->pixelPayloadSize + config->hsw + config->hbp + config->hfp), bpp, div); in DSI_ConfigureHorizontalParams()
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| /hal_nxp-latest/mcux/mcux-sdk/components/sm/clock/ |
| D | sm_clock.c | 31 uint32_t div = sm_clk->div; in SM_CLOCK_SetRootClock() local
39 if (div == 0) in SM_CLOCK_SetRootClock()
60 rootRate = srcRate / div; in SM_CLOCK_SetRootClock()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/RW612/drivers/ |
| D | fsl_clock.c | 216 uint32_t div = in CLOCK_GetTcpuMciFlexspiClkFreq() local
219 return CLOCK_GetTcpuFvcoFreq() / (12UL - div); in CLOCK_GetTcpuMciFlexspiClkFreq()
227 uint32_t div = in CLOCK_GetTddrMciFlexspiClkFreq() local
230 return CLOCK_MHZ(3200UL) / (11UL - div); in CLOCK_GetTddrMciFlexspiClkFreq()
1176 static uint32_t CLOCK_CfgTcpuRefClk(uint32_t targetHz, clock_tcpu_flexspi_div_t div) in CLOCK_CfgTcpuRefClk() argument
1210 SYSCTL2_PLL_CTRL_TCPU_FBDIV(steps) | SYSCTL2_PLL_CTRL_TCPU_FLEXSPI_CLK_SEL(div); in CLOCK_CfgTcpuRefClk()
1222 uint32_t CLOCK_InitTcpuRefClk(uint32_t targetHz, clock_tcpu_flexspi_div_t div) in CLOCK_InitTcpuRefClk() argument
1232 freq = CLOCK_CfgTcpuRefClk(targetHz, div); in CLOCK_InitTcpuRefClk()
1265 void CLOCK_InitTddrRefClk(clock_tddr_flexspi_div_t div) in CLOCK_InitTddrRefClk() argument
1274 …L_CTRL & ~SYSCTL2_PLL_CTRL_TDDR_FLEXSPI_CLK_SEL_MASK) | SYSCTL2_PLL_CTRL_TDDR_FLEXSPI_CLK_SEL(div); in CLOCK_InitTddrRefClk()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/RW610/drivers/ |
| D | fsl_clock.c | 216 uint32_t div = in CLOCK_GetTcpuMciFlexspiClkFreq() local
219 return CLOCK_GetTcpuFvcoFreq() / (12UL - div); in CLOCK_GetTcpuMciFlexspiClkFreq()
227 uint32_t div = in CLOCK_GetTddrMciFlexspiClkFreq() local
230 return CLOCK_MHZ(3200UL) / (11UL - div); in CLOCK_GetTddrMciFlexspiClkFreq()
1176 static uint32_t CLOCK_CfgTcpuRefClk(uint32_t targetHz, clock_tcpu_flexspi_div_t div) in CLOCK_CfgTcpuRefClk() argument
1210 SYSCTL2_PLL_CTRL_TCPU_FBDIV(steps) | SYSCTL2_PLL_CTRL_TCPU_FLEXSPI_CLK_SEL(div); in CLOCK_CfgTcpuRefClk()
1222 uint32_t CLOCK_InitTcpuRefClk(uint32_t targetHz, clock_tcpu_flexspi_div_t div) in CLOCK_InitTcpuRefClk() argument
1232 freq = CLOCK_CfgTcpuRefClk(targetHz, div); in CLOCK_InitTcpuRefClk()
1265 void CLOCK_InitTddrRefClk(clock_tddr_flexspi_div_t div) in CLOCK_InitTddrRefClk() argument
1274 …L_CTRL & ~SYSCTL2_PLL_CTRL_TDDR_FLEXSPI_CLK_SEL_MASK) | SYSCTL2_PLL_CTRL_TDDR_FLEXSPI_CLK_SEL(div); in CLOCK_InitTddrRefClk()
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| /hal_nxp-latest/mcux/mcux-sdk/CMSIS/DSP/Source/InterpolationFunctions/ |
| D | arm_spline_interp_f32.c | 172 float32x4_t div; in arm_spline_f32() local
190 div = vdupq_n_f32(d[i]); in arm_spline_f32()
211 yv = vmlaq_f32(yv, div, temp); in arm_spline_f32()
255 yv = vmlaq_f32(yv, div, temp); in arm_spline_f32()
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| /hal_nxp-latest/mcux/mcux-sdk/components/clock/ |
| D | hal_clock.c | 29 sm_clk.div = hal_clk->div; in HAL_ClockSetRootClk()
167 config.div = hal_clk->div; in HAL_ClockSetRootClk()
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| /hal_nxp-latest/mcux/mcux-sdk/components/internal_flash/hyper_flash/RT1050/ |
| D | fsl_adapter_flexspi_hyper_flash_config.c | 72 uint32_t div; in flexspi_get_frequency() local
85 div = CLOCK_GetDiv(kCLOCK_FlexspiDiv); in flexspi_get_frequency()
87 fre = CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk) / (div + 0x01U); in flexspi_get_frequency()
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| /hal_nxp-latest/mcux/mcux-sdk/components/ssd1963/ |
| D | fsl_ssd1963.c | 72 static uint32_t SSD1963_GetPllDivider(uint8_t *multi, uint8_t *div, uint32_t srcClock_Hz);
90 static uint32_t SSD1963_GetPllDivider(uint8_t *multi, uint8_t *div, uint32_t srcClock_Hz) in SSD1963_GetPllDivider() argument
152 *div = (uint8_t)divCandidate; in SSD1963_GetPllDivider()
166 uint8_t multi, div; in SSD1963_Init() local
178 pllFreq_Hz = SSD1963_GetPllDivider(&multi, &div, srcClock_Hz); in SSD1963_Init()
211 commandParam[1] = (uint8_t)(div | (1U << 5U)); in SSD1963_Init()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC802/drivers/ |
| D | fsl_clock.c | 166 uint32_t div = SYSCON->CLKOUTDIV & 0xffU, freq = 0U; in CLOCK_GetClockOutClkFreq() local
191 return div == 0U ? 0U : (freq / div); in CLOCK_GetClockOutClkFreq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9131/drivers/ |
| D | fsl_clock.h | 166 uint8_t div; /*!< it's the actual divider */ member
1157 static inline void CLOCK_SetRootClockDiv(clock_root_t root, uint8_t div) in CLOCK_SetRootClockDiv() argument
1159 assert(div); in CLOCK_SetRootClockDiv()
1162 CCM_CLOCK_ROOT_DIV((uint32_t)div - 1UL); in CLOCK_SetRootClockDiv()
1216 … CCM_CLOCK_ROOT_DIV((uint32_t)config->div - 1UL) | in CLOCK_SetRootClock()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9352/drivers/ |
| D | fsl_clock.h | 166 uint8_t div; /*!< it's the actual divider */ member
1157 static inline void CLOCK_SetRootClockDiv(clock_root_t root, uint8_t div) in CLOCK_SetRootClockDiv() argument
1159 assert(div); in CLOCK_SetRootClockDiv()
1162 CCM_CLOCK_ROOT_DIV((uint32_t)div - 1UL); in CLOCK_SetRootClockDiv()
1216 … CCM_CLOCK_ROOT_DIV((uint32_t)config->div - 1UL) | in CLOCK_SetRootClock()
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