1 /*
2  * Copyright 2023 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 #include "hal_config.h"
7 #include "hal_clock.h"
8 #if SM_CLOCK
9 #include "sm_clock.h"
10 #elif CCM_CLOCK
11 #include "fsl_clock.h"
12 #endif
13 
14 #if SM_CLOCK && CCM_CLOCK
15 #error "Pls not define them as 1 at the same time in hal_config.h!!!"
16 #endif
17 
18 volatile uint64_t g_halClkFreq[HAL_CLOCK_PLATFORM_MAX_ID] = {0ULL};
19 
20 #if SM_CLOCK
HAL_ClockSetRootClk(hal_clk_t * hal_clk)21 void HAL_ClockSetRootClk(hal_clk_t *hal_clk)
22 {
23     sm_clock_t sm_clk         = {0};
24     uint32_t clk_round_option = hal_clk->clk_round_opt;
25 
26     sm_clk.clk_id     = hal_clk->clk_id;
27     sm_clk.pclk_id    = hal_clk->pclk_id;
28     sm_clk.channel    = SM_PLATFORM_A2P;
29     sm_clk.div        = hal_clk->div;
30     sm_clk.attributes = SCMI_CLOCK_CONFIG_SET_ENABLE(hal_clk->enable_clk);
31 
32     switch (hal_clk->clk_round_opt)
33     {
34         case hal_clk_round_down:
35             clk_round_option = SCMI_CLOCK_ROUND_DOWN;
36             break;
37         case hal_clk_round_up:
38             clk_round_option = SCMI_CLOCK_ROUND_UP;
39             break;
40         case hal_clk_round_auto:
41             clk_round_option = SCMI_CLOCK_ROUND_AUTO;
42             break;
43         default:
44             break;
45     }
46     sm_clk.flags = SCMI_CLOCK_RATE_FLAGS_ROUND(clk_round_option);
47 
48     SM_CLOCK_SetRootClock(&sm_clk);
49 }
HAL_ClockEnableRootClk(hal_clk_t * hal_clk)50 void HAL_ClockEnableRootClk(hal_clk_t *hal_clk)
51 {
52     sm_clock_t sm_clk         = {0};
53     uint32_t clk_round_option = hal_clk->clk_round_opt;
54 
55     sm_clk.clk_id     = hal_clk->clk_id;
56     sm_clk.channel    = SM_PLATFORM_A2P;
57     sm_clk.attributes = SCMI_CLOCK_CONFIG_SET_ENABLE(hal_clk->enable_clk);
58 
59     switch (hal_clk->clk_round_opt)
60     {
61         case hal_clk_round_down:
62             clk_round_option = SCMI_CLOCK_ROUND_DOWN;
63             break;
64         case hal_clk_round_up:
65             clk_round_option = SCMI_CLOCK_ROUND_UP;
66             break;
67         case hal_clk_round_auto:
68             clk_round_option = SCMI_CLOCK_ROUND_AUTO;
69             break;
70         default:
71             break;
72     }
73     sm_clk.flags = SCMI_CLOCK_RATE_FLAGS_ROUND(clk_round_option);
74 
75     SM_CLOCK_EnableRootClock(&sm_clk);
76 }
77 
HAL_ClockSetPllClk(hal_clk_t * hal_clk)78 void HAL_ClockSetPllClk(hal_clk_t *hal_clk)
79 {
80     sm_clock_t sm_clk         = {0};
81     uint32_t clk_round_option = hal_clk->clk_round_opt;
82 
83     sm_clk.clk_id     = hal_clk->clk_id;
84     sm_clk.channel    = SM_PLATFORM_A2P;
85     sm_clk.rateu       = hal_clk->rateu;
86     sm_clk.ratel       = hal_clk->ratel;
87 
88     switch (hal_clk->clk_round_opt)
89     {
90         case hal_clk_round_down:
91             clk_round_option = SCMI_CLOCK_ROUND_DOWN;
92             break;
93         case hal_clk_round_up:
94             clk_round_option = SCMI_CLOCK_ROUND_UP;
95             break;
96         case hal_clk_round_auto:
97             clk_round_option = SCMI_CLOCK_ROUND_AUTO;
98             break;
99         default:
100             break;
101     }
102     sm_clk.flags = SCMI_CLOCK_RATE_FLAGS_ROUND(clk_round_option);
103 
104     SM_CLOCK_SetPllClock(&sm_clk);
105 }
106 
HAL_ClockGetIpFreq(hal_clk_id_e clk_id)107 uint64_t HAL_ClockGetIpFreq(hal_clk_id_e clk_id)
108 {
109     sm_clock_t sm_clk = {0};
110 
111     if (clk_id < HAL_CLOCK_PLATFORM_SOURCE_NUM)
112     {
113         return 0UL;
114     }
115     sm_clk.clk_id  = (uint32_t)clk_id;
116     sm_clk.channel = SM_PLATFORM_A2P;
117 
118     g_halClkFreq[clk_id] = SM_CLOCK_GetIpFreq(&sm_clk);
119 
120     return g_halClkFreq[clk_id];
121 }
122 
HAL_ClockGetFreq(hal_clk_id_e clk_id)123 uint64_t HAL_ClockGetFreq(hal_clk_id_e clk_id)
124 {
125     sm_clock_t sm_clk = {0};
126 
127     sm_clk.clk_id  = (uint32_t)clk_id;
128     sm_clk.channel = SM_PLATFORM_A2P;
129     if (clk_id >= HAL_CLOCK_PLATFORM_SOURCE_NUM)
130     {
131         g_halClkFreq[clk_id] = SM_CLOCK_GetIpFreq(&sm_clk);
132     }
133     else
134     {
135         g_halClkFreq[clk_id] = SM_CLOCK_GetSourceFreq(&sm_clk);
136     }
137 
138     return g_halClkFreq[clk_id];
139 }
140 #elif CCM_CLOCK
HAL_ClockSetRootClk(hal_clk_t * hal_clk)141 void HAL_ClockSetRootClk(hal_clk_t *hal_clk)
142 {
143     clock_root_t name                   = (clock_root_t)0;
144     clock_root_config_t config          = {0};
145     const clock_root_config_t *p_config = &config;
146     uint32_t mux_id                     = 0;
147 
148     config.clockOff = !hal_clk->enable_clk;
149 
150     if (hal_clk->clk_id < HAL_CLOCK_PLATFORM_SOURCE_NUM)
151     {
152         return;
153     }
154     name = (clock_root_t)(hal_clk->clk_id - HAL_CLOCK_PLATFORM_SOURCE_NUM);
155     if (hal_clk->pclk_id > HAL_CLOCK_PLATFORM_SOURCE_NUM)
156     {
157         return;
158     }
159 
160     mux_id = HAL_ClockPlatformGetMuxId(hal_clk->clk_id, hal_clk->pclk_id);
161     if (mux_id == HAL_CLOCK_PLATFORM_MUX_MAX_ID)
162     {
163         return;
164     }
165 
166     config.mux = mux_id;
167     config.div = hal_clk->div;
168 
169     CLOCK_SetRootClock(name, p_config);
170 }
171 
172 
HAL_ClockSetPllClk(hal_clk_t * hal_clk)173 void HAL_ClockSetPllClk(hal_clk_t *hal_clk)
174 {
175 }
176 
HAL_ClockGetIpFreq(hal_clk_id_e clk_id)177 uint64_t HAL_ClockGetIpFreq(hal_clk_id_e clk_id)
178 {
179     clock_root_t name = (clock_root_t)(clk_id - HAL_CLOCK_PLATFORM_SOURCE_NUM);
180 
181     g_halClkFreq[clk_id] = CLOCK_GetIpFreq(name);
182 
183     return g_halClkFreq[clk_id];
184 }
185 
HAL_ClockGetFreq(hal_clk_id_e clk_id)186 uint64_t HAL_ClockGetFreq(hal_clk_id_e clk_id)
187 {
188     if (clk_id >= HAL_CLOCK_PLATFORM_SOURCE_NUM)
189     {
190         g_halClkFreq[clk_id] = CLOCK_GetIpFreq((clock_root_t)(clk_id - HAL_CLOCK_PLATFORM_SOURCE_NUM));
191     }
192     else
193     {
194         g_halClkFreq[clk_id] = CLOCK_GetSourceFreq((uint32_t)clk_id);
195     }
196 
197     return g_halClkFreq[clk_id];
198 }
199 #else
200 #error "Pls define macro SM_CLOCK or CCM_CLOCK in hal_config.h.!!!"
201 #endif
202