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Searched refs:bit_shift (Results 1 – 25 of 115) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/drivers/
Dfsl_clock.h682 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_EnableClock() local
695 SYSCON->PWM0SUBCTL |= (1UL << bit_shift); in CLOCK_EnableClock()
700 SYSCON->PWM1SUBCTL |= (1UL << bit_shift); in CLOCK_EnableClock()
705 *pClkCtrl = (1UL << bit_shift); in CLOCK_EnableClock()
720 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_DisableClock() local
733 SYSCON->PWM0SUBCTL &= ~(1UL << bit_shift); in CLOCK_DisableClock()
742 SYSCON->PWM1SUBCTL &= ~(1UL << bit_shift); in CLOCK_DisableClock()
751 *pClkCtrl = (1UL << bit_shift); in CLOCK_DisableClock()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/drivers/
Dfsl_clock.h682 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_EnableClock() local
695 SYSCON->PWM0SUBCTL |= (1UL << bit_shift); in CLOCK_EnableClock()
700 SYSCON->PWM1SUBCTL |= (1UL << bit_shift); in CLOCK_EnableClock()
705 *pClkCtrl = (1UL << bit_shift); in CLOCK_EnableClock()
720 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_DisableClock() local
733 SYSCON->PWM0SUBCTL &= ~(1UL << bit_shift); in CLOCK_DisableClock()
742 SYSCON->PWM1SUBCTL &= ~(1UL << bit_shift); in CLOCK_DisableClock()
751 *pClkCtrl = (1UL << bit_shift); in CLOCK_DisableClock()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/drivers/
Dfsl_clock.h682 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_EnableClock() local
695 SYSCON->PWM0SUBCTL |= (1UL << bit_shift); in CLOCK_EnableClock()
700 SYSCON->PWM1SUBCTL |= (1UL << bit_shift); in CLOCK_EnableClock()
705 *pClkCtrl = (1UL << bit_shift); in CLOCK_EnableClock()
720 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_DisableClock() local
733 SYSCON->PWM0SUBCTL &= ~(1UL << bit_shift); in CLOCK_DisableClock()
742 SYSCON->PWM1SUBCTL &= ~(1UL << bit_shift); in CLOCK_DisableClock()
751 *pClkCtrl = (1UL << bit_shift); in CLOCK_DisableClock()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/drivers/
Dfsl_clock.h682 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_EnableClock() local
695 SYSCON->PWM0SUBCTL |= (1UL << bit_shift); in CLOCK_EnableClock()
700 SYSCON->PWM1SUBCTL |= (1UL << bit_shift); in CLOCK_EnableClock()
705 *pClkCtrl = (1UL << bit_shift); in CLOCK_EnableClock()
720 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_DisableClock() local
733 SYSCON->PWM0SUBCTL &= ~(1UL << bit_shift); in CLOCK_DisableClock()
742 SYSCON->PWM1SUBCTL &= ~(1UL << bit_shift); in CLOCK_DisableClock()
751 *pClkCtrl = (1UL << bit_shift); in CLOCK_DisableClock()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/drivers/
Dfsl_clock.h682 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_EnableClock() local
695 SYSCON->PWM0SUBCTL |= (1UL << bit_shift); in CLOCK_EnableClock()
700 SYSCON->PWM1SUBCTL |= (1UL << bit_shift); in CLOCK_EnableClock()
705 *pClkCtrl = (1UL << bit_shift); in CLOCK_EnableClock()
720 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_DisableClock() local
733 SYSCON->PWM0SUBCTL &= ~(1UL << bit_shift); in CLOCK_DisableClock()
742 SYSCON->PWM1SUBCTL &= ~(1UL << bit_shift); in CLOCK_DisableClock()
751 *pClkCtrl = (1UL << bit_shift); in CLOCK_DisableClock()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/drivers/
Dfsl_clock.h682 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_EnableClock() local
695 SYSCON->PWM0SUBCTL |= (1UL << bit_shift); in CLOCK_EnableClock()
700 SYSCON->PWM1SUBCTL |= (1UL << bit_shift); in CLOCK_EnableClock()
705 *pClkCtrl = (1UL << bit_shift); in CLOCK_EnableClock()
720 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_DisableClock() local
733 SYSCON->PWM0SUBCTL &= ~(1UL << bit_shift); in CLOCK_DisableClock()
742 SYSCON->PWM1SUBCTL &= ~(1UL << bit_shift); in CLOCK_DisableClock()
751 *pClkCtrl = (1UL << bit_shift); in CLOCK_DisableClock()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/drivers/
Dfsl_clock.h549 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_EnableClock() local
562 SYSCON->PWM0SUBCTL |= (1UL << bit_shift); in CLOCK_EnableClock()
567 *pClkCtrl = (1UL << bit_shift); in CLOCK_EnableClock()
582 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_DisableClock() local
595 SYSCON->PWM0SUBCTL &= ~(1UL << bit_shift); in CLOCK_DisableClock()
604 *pClkCtrl = (1UL << bit_shift); in CLOCK_DisableClock()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/drivers/
Dfsl_clock.h549 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_EnableClock() local
562 SYSCON->PWM0SUBCTL |= (1UL << bit_shift); in CLOCK_EnableClock()
567 *pClkCtrl = (1UL << bit_shift); in CLOCK_EnableClock()
582 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_DisableClock() local
595 SYSCON->PWM0SUBCTL &= ~(1UL << bit_shift); in CLOCK_DisableClock()
604 *pClkCtrl = (1UL << bit_shift); in CLOCK_DisableClock()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/drivers/
Dfsl_clock.h549 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_EnableClock() local
562 SYSCON->PWM0SUBCTL |= (1UL << bit_shift); in CLOCK_EnableClock()
567 *pClkCtrl = (1UL << bit_shift); in CLOCK_EnableClock()
582 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_DisableClock() local
595 SYSCON->PWM0SUBCTL &= ~(1UL << bit_shift); in CLOCK_DisableClock()
604 *pClkCtrl = (1UL << bit_shift); in CLOCK_DisableClock()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/drivers/
Dfsl_clock.h549 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_EnableClock() local
562 SYSCON->PWM0SUBCTL |= (1UL << bit_shift); in CLOCK_EnableClock()
567 *pClkCtrl = (1UL << bit_shift); in CLOCK_EnableClock()
582 uint32_t bit_shift = CLK_GATE_BIT_SHIFT(clk); in CLOCK_DisableClock() local
595 SYSCON->PWM0SUBCTL &= ~(1UL << bit_shift); in CLOCK_DisableClock()
604 *pClkCtrl = (1UL << bit_shift); in CLOCK_DisableClock()
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/drivers/
Dfsl_clock.h212 #define CLK_GATE_DEFINE(reg_offset, bit_shift) \ argument
214 (((bit_shift) << CLK_GATE_BIT_SHIFT_SHIFT) & CLK_GATE_BIT_SHIFT_MASK))
227 #define SYS_CLK_GATE_DEFINE(bit_shift) (((bit_shift)&CLK_GATE_BIT_SHIFT_MASK) | SYS_CLK_GATE_FLAG_M… argument
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/drivers/
Dfsl_clock.h212 #define CLK_GATE_DEFINE(reg_offset, bit_shift) \ argument
214 (((bit_shift) << CLK_GATE_BIT_SHIFT_SHIFT) & CLK_GATE_BIT_SHIFT_MASK))
227 #define SYS_CLK_GATE_DEFINE(bit_shift) (((bit_shift)&CLK_GATE_BIT_SHIFT_MASK) | SYS_CLK_GATE_FLAG_M… argument
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE02Z4/drivers/
Dfsl_clock.h207 #define CLK_GATE_DEFINE(reg_offset, bit_shift) \ argument
209 (((bit_shift) << CLK_GATE_BIT_SHIFT_SHIFT) & CLK_GATE_BIT_SHIFT_MASK))
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC041/drivers/
Dfsl_clock.h204 #define CLK_GATE_DEFINE(reg_offset, bit_shift) \ argument
206 (((bit_shift) << CLK_GATE_BIT_SHIFT_SHIFT) & CLK_GATE_BIT_SHIFT_MASK))
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE06Z4/drivers/
Dfsl_clock.h222 #define CLK_GATE_DEFINE(reg_offset, bit_shift) \ argument
224 (((bit_shift) << CLK_GATE_BIT_SHIFT_SHIFT) & CLK_GATE_BIT_SHIFT_MASK))
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z1284/drivers/
Dfsl_clock.h222 #define CLK_GATE_DEFINE(reg_offset, bit_shift) \ argument
224 (((bit_shift) << CLK_GATE_BIT_SHIFT_SHIFT) & CLK_GATE_BIT_SHIFT_MASK))
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z4/drivers/
Dfsl_clock.h216 #define CLK_GATE_DEFINE(reg_offset, bit_shift) \ argument
218 (((bit_shift) << CLK_GATE_BIT_SHIFT_SHIFT) & CLK_GATE_BIT_SHIFT_MASK))
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC142/drivers/
Dfsl_clock.h249 #define CLK_GATE_DEFINE(reg_offset, bit_shift) \ argument
251 (((bit_shift) << CLK_GATE_BIT_SHIFT_SHIFT) & CLK_GATE_BIT_SHIFT_MASK))
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC141/drivers/
Dfsl_clock.h249 #define CLK_GATE_DEFINE(reg_offset, bit_shift) \ argument
251 (((bit_shift) << CLK_GATE_BIT_SHIFT_SHIFT) & CLK_GATE_BIT_SHIFT_MASK))
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL17Z644/drivers/
Dfsl_clock.h250 #define CLK_GATE_DEFINE(reg_offset, bit_shift) \ argument
252 (((bit_shift) << CLK_GATE_BIT_SHIFT_SHIFT) & CLK_GATE_BIT_SHIFT_MASK))
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC243/drivers/
Dfsl_clock.h267 #define CLK_GATE_DEFINE(reg_offset, bit_shift) \ argument
269 (((uint32_t)(bit_shift) << CLK_GATE_BIT_SHIFT_SHIFT) & CLK_GATE_BIT_SHIFT_MASK))
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/drivers/
Dfsl_clock.h267 #define CLK_GATE_DEFINE(reg_offset, bit_shift) \ argument
269 (((uint32_t)(bit_shift) << CLK_GATE_BIT_SHIFT_SHIFT) & CLK_GATE_BIT_SHIFT_MASK))
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC242/drivers/
Dfsl_clock.h255 #define CLK_GATE_DEFINE(reg_offset, bit_shift) \ argument
257 (((bit_shift) << CLK_GATE_BIT_SHIFT_SHIFT) & CLK_GATE_BIT_SHIFT_MASK))
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/drivers/
Dfsl_clock.h267 #define CLK_GATE_DEFINE(reg_offset, bit_shift) \ argument
269 (((uint32_t)(bit_shift) << CLK_GATE_BIT_SHIFT_SHIFT) & CLK_GATE_BIT_SHIFT_MASK))
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC143/drivers/
Dfsl_clock.h267 #define CLK_GATE_DEFINE(reg_offset, bit_shift) \ argument
269 (((uint32_t)(bit_shift) << CLK_GATE_BIT_SHIFT_SHIFT) & CLK_GATE_BIT_SHIFT_MASK))

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