Searched refs:SYSTICKFCLKDIV_OFFSET (Results 1 – 8 of 8) sorted by relevance
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/ |
| D | fsl_clock.h | 816 #define SYSTICKFCLKDIV_OFFSET 0x764 macro
873 #define SYSTICKFCLKDIV_OFFSET 0x764 macro
1705 …kCLOCK_DivSystickClk = CLKCTL0_TUPLE_MUXA(SYSTICKFCLKDIV_OFFSET, 0), /*!< SYSTICK Clk Divider. …
1728 …kCLOCK_DivSystickClk = CLKCTL1_TUPLE_MUXA(SYSTICKFCLKDIV_OFFSET, 0), /*!< SYSTICK Function…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/ |
| D | fsl_clock.h | 816 #define SYSTICKFCLKDIV_OFFSET 0x764 macro
873 #define SYSTICKFCLKDIV_OFFSET 0x764 macro
1705 …kCLOCK_DivSystickClk = CLKCTL0_TUPLE_MUXA(SYSTICKFCLKDIV_OFFSET, 0), /*!< SYSTICK Clk Divider. …
1728 …kCLOCK_DivSystickClk = CLKCTL1_TUPLE_MUXA(SYSTICKFCLKDIV_OFFSET, 0), /*!< SYSTICK Function…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/ |
| D | fsl_clock.h | 816 #define SYSTICKFCLKDIV_OFFSET 0x764 macro
873 #define SYSTICKFCLKDIV_OFFSET 0x764 macro
1705 …kCLOCK_DivSystickClk = CLKCTL0_TUPLE_MUXA(SYSTICKFCLKDIV_OFFSET, 0), /*!< SYSTICK Clk Divider. …
1728 …kCLOCK_DivSystickClk = CLKCTL1_TUPLE_MUXA(SYSTICKFCLKDIV_OFFSET, 0), /*!< SYSTICK Function…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/drivers/ |
| D | fsl_clock.h | 475 #define SYSTICKFCLKDIV_OFFSET 0x764 macro
782 …kCLOCK_DivSystickClk = CLKCTL0_TUPLE_MUXA(SYSTICKFCLKDIV_OFFSET, 0), /*!< Systick Clk Divider.…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/drivers/ |
| D | fsl_clock.h | 475 #define SYSTICKFCLKDIV_OFFSET 0x764 macro
782 …kCLOCK_DivSystickClk = CLKCTL0_TUPLE_MUXA(SYSTICKFCLKDIV_OFFSET, 0), /*!< Systick Clk Divider.…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/drivers/ |
| D | fsl_clock.h | 597 #define SYSTICKFCLKDIV_OFFSET 0x764 macro
972 …kCLOCK_DivSystickClk = CLKCTL0_TUPLE_MUXA(SYSTICKFCLKDIV_OFFSET, 0), /*!< Systick Clk Divider.…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/drivers/ |
| D | fsl_clock.h | 597 #define SYSTICKFCLKDIV_OFFSET 0x764 macro
972 …kCLOCK_DivSystickClk = CLKCTL0_TUPLE_MUXA(SYSTICKFCLKDIV_OFFSET, 0), /*!< Systick Clk Divider.…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/drivers/ |
| D | fsl_clock.h | 597 #define SYSTICKFCLKDIV_OFFSET 0x764 macro
972 …kCLOCK_DivSystickClk = CLKCTL0_TUPLE_MUXA(SYSTICKFCLKDIV_OFFSET, 0), /*!< Systick Clk Divider.…
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