Home
last modified time | relevance | path

Searched refs:SYSPM_PMCR_MENB_MASK (Results 1 – 25 of 40) sorted by relevance

12

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h34007 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
34013 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h36176 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
36182 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h59965 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
59971 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h59923 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
59929 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h41188 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
41194 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
DMCXW727C_cm33_core1.h46378 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
46384 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h76090 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
76096 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
DMCXN546_cm33_core1.h76090 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
76096 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h76090 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
76096 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
DMCXN547_cm33_core1.h76090 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
76096 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h80949 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
80955 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
DMIMXRT798S_cm33_core0.h81036 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
81042 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
DMIMXRT798S_ezhv.h85861 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
85867 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h82692 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
82698 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
DMIMXRT735S_cm33_core0.h77811 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
77817 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h81036 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
81042 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
DMIMXRT758S_ezhv.h85837 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
85843 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h78756 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
78762 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
DMCXN947_cm33_core0.h78756 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
78762 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h78756 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
78762 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
DMCXN946_cm33_core1.h78756 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
78762 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1182/
DMIMXRT1182.h80876 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
80882 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1181/
DMIMXRT1181.h77027 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
77033 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/
DMIMXRT1187_cm33.h81086 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
81092 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/
DMIMXRT1189_cm33.h84934 #define SYSPM_PMCR_MENB_MASK (0x1U) macro
84940 … (((uint32_t)(((uint32_t)(x)) << SYSPM_PMCR_MENB_SHIFT)) & SYSPM_PMCR_MENB_MASK)

12