Home
last modified time | relevance | path

Searched refs:SYSCTL0 (Results 1 – 25 of 39) sorted by relevance

12

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_power.c377 SYSCTL0->PDSLEEPCFG0 = (SYSCTL0->PDRUNCFG0 | SYSCTL0_PDSLEEPCFG0_MAINCLK_SHUTOFF_MASK) & in AT_QUICKACCESS_SECTION_CODE()
379 SYSCTL0->PDSLEEPCFG1 = SYSCTL0->PDRUNCFG1; in AT_QUICKACCESS_SECTION_CODE()
380 SYSCTL0->PDSLEEPCFG2 = SYSCTL0->PDRUNCFG2; in AT_QUICKACCESS_SECTION_CODE()
381 SYSCTL0->PDSLEEPCFG3 = SYSCTL0->PDRUNCFG3; in AT_QUICKACCESS_SECTION_CODE()
382 SYSCTL0->PDWAKECFG = PDWAKECFG_RBBKEEPST_MASK | PDWAKECFG_RBBSRAMKEEPST_MASK; in AT_QUICKACCESS_SECTION_CODE()
388 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMU_PMIC_IRQn - 32U); in AT_QUICKACCESS_SECTION_CODE()
397 SYSCTL0->STARTEN1_CLR = 1UL << ((uint32_t)PMU_PMIC_IRQn - 32U); in AT_QUICKACCESS_SECTION_CODE()
398 SYSCTL0->PDWAKECFG = 0U; in AT_QUICKACCESS_SECTION_CODE()
425 SYSCTL0->PDSLEEPCFG0 = in AT_QUICKACCESS_SECTION_CODE()
426 …(SYSCTL0->PDRUNCFG0 | SYSCTL0_PDSLEEPCFG0_MAINCLK_SHUTOFF_MASK) & ~SYSCTL0_PDSLEEPCFG0_FBB_PD_MASK; in AT_QUICKACCESS_SECTION_CODE()
[all …]
Dfsl_power.h28 #define SYSCTL0_PDRCFGSET_REG(x) (*((volatile uint32_t *)((uint32_t)(&(SYSCTL0->PDRUNCFG0_SET)) + (…
29 #define SYSCTL0_PDRCFGCLR_REG(x) (*((volatile uint32_t *)((uint32_t)(&(SYSCTL0->PDRUNCFG0_CLR)) + (…
243 #define SYSCTL0_TUPLE_REG(reg) (*((volatile uint32_t *)(((uint32_t)(SYSCTL0)) + (((uint32_t)(reg)) …
Dfsl_clock.c1370 …SYSCTL0->PDRUNCFG0_SET = SYSCTL0_PDRUNCFG0_SYSPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_SYSPLLANA_PD_MASK; in CLOCK_InitSysPll()
1412 …SYSCTL0->PDRUNCFG0_CLR = SYSCTL0_PDRUNCFG0_SYSPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_SYSPLLANA_PD_MASK; in CLOCK_InitSysPll()
1460 …SYSCTL0->PDRUNCFG0_SET = SYSCTL0_PDRUNCFG0_AUDPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_AUDPLLANA_PD_MASK; in CLOCK_InitAudioPll()
1503 …SYSCTL0->PDRUNCFG0_CLR = SYSCTL0_PDRUNCFG0_AUDPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_AUDPLLANA_PD_MASK; in CLOCK_InitAudioPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_power.c377 SYSCTL0->PDSLEEPCFG0 = (SYSCTL0->PDRUNCFG0 | SYSCTL0_PDSLEEPCFG0_MAINCLK_SHUTOFF_MASK) & in AT_QUICKACCESS_SECTION_CODE()
379 SYSCTL0->PDSLEEPCFG1 = SYSCTL0->PDRUNCFG1; in AT_QUICKACCESS_SECTION_CODE()
380 SYSCTL0->PDSLEEPCFG2 = SYSCTL0->PDRUNCFG2; in AT_QUICKACCESS_SECTION_CODE()
381 SYSCTL0->PDSLEEPCFG3 = SYSCTL0->PDRUNCFG3; in AT_QUICKACCESS_SECTION_CODE()
382 SYSCTL0->PDWAKECFG = PDWAKECFG_RBBKEEPST_MASK | PDWAKECFG_RBBSRAMKEEPST_MASK; in AT_QUICKACCESS_SECTION_CODE()
388 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMU_PMIC_IRQn - 32U); in AT_QUICKACCESS_SECTION_CODE()
397 SYSCTL0->STARTEN1_CLR = 1UL << ((uint32_t)PMU_PMIC_IRQn - 32U); in AT_QUICKACCESS_SECTION_CODE()
398 SYSCTL0->PDWAKECFG = 0U; in AT_QUICKACCESS_SECTION_CODE()
425 SYSCTL0->PDSLEEPCFG0 = in AT_QUICKACCESS_SECTION_CODE()
426 …(SYSCTL0->PDRUNCFG0 | SYSCTL0_PDSLEEPCFG0_MAINCLK_SHUTOFF_MASK) & ~SYSCTL0_PDSLEEPCFG0_FBB_PD_MASK; in AT_QUICKACCESS_SECTION_CODE()
[all …]
Dfsl_dsp.h74 SYSCTL0->DSP_VECT_REMAP = in DSP_SetVecRemap()
97 SYSCTL0->DSPSTALL = 0x0; in DSP_Start()
105 SYSCTL0->DSPSTALL = 0x1; in DSP_Stop()
Dfsl_power.h28 #define SYSCTL0_PDRCFGSET_REG(x) (*((volatile uint32_t *)((uint32_t)(&(SYSCTL0->PDRUNCFG0_SET)) + (…
29 #define SYSCTL0_PDRCFGCLR_REG(x) (*((volatile uint32_t *)((uint32_t)(&(SYSCTL0->PDRUNCFG0_CLR)) + (…
243 #define SYSCTL0_TUPLE_REG(reg) (*((volatile uint32_t *)(((uint32_t)(SYSCTL0)) + (((uint32_t)(reg)) …
Dfsl_clock.c1370 …SYSCTL0->PDRUNCFG0_SET = SYSCTL0_PDRUNCFG0_SYSPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_SYSPLLANA_PD_MASK; in CLOCK_InitSysPll()
1412 …SYSCTL0->PDRUNCFG0_CLR = SYSCTL0_PDRUNCFG0_SYSPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_SYSPLLANA_PD_MASK; in CLOCK_InitSysPll()
1460 …SYSCTL0->PDRUNCFG0_SET = SYSCTL0_PDRUNCFG0_AUDPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_AUDPLLANA_PD_MASK; in CLOCK_InitAudioPll()
1503 …SYSCTL0->PDRUNCFG0_CLR = SYSCTL0_PDRUNCFG0_AUDPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_AUDPLLANA_PD_MASK; in CLOCK_InitAudioPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_power.c377 SYSCTL0->PDSLEEPCFG0 = (SYSCTL0->PDRUNCFG0 | SYSCTL0_PDSLEEPCFG0_MAINCLK_SHUTOFF_MASK) & in AT_QUICKACCESS_SECTION_CODE()
379 SYSCTL0->PDSLEEPCFG1 = SYSCTL0->PDRUNCFG1; in AT_QUICKACCESS_SECTION_CODE()
380 SYSCTL0->PDSLEEPCFG2 = SYSCTL0->PDRUNCFG2; in AT_QUICKACCESS_SECTION_CODE()
381 SYSCTL0->PDSLEEPCFG3 = SYSCTL0->PDRUNCFG3; in AT_QUICKACCESS_SECTION_CODE()
382 SYSCTL0->PDWAKECFG = PDWAKECFG_RBBKEEPST_MASK | PDWAKECFG_RBBSRAMKEEPST_MASK; in AT_QUICKACCESS_SECTION_CODE()
388 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMU_PMIC_IRQn - 32U); in AT_QUICKACCESS_SECTION_CODE()
397 SYSCTL0->STARTEN1_CLR = 1UL << ((uint32_t)PMU_PMIC_IRQn - 32U); in AT_QUICKACCESS_SECTION_CODE()
398 SYSCTL0->PDWAKECFG = 0U; in AT_QUICKACCESS_SECTION_CODE()
425 SYSCTL0->PDSLEEPCFG0 = in AT_QUICKACCESS_SECTION_CODE()
426 …(SYSCTL0->PDRUNCFG0 | SYSCTL0_PDSLEEPCFG0_MAINCLK_SHUTOFF_MASK) & ~SYSCTL0_PDSLEEPCFG0_FBB_PD_MASK; in AT_QUICKACCESS_SECTION_CODE()
[all …]
Dfsl_power.h28 #define SYSCTL0_PDRCFGSET_REG(x) (*((volatile uint32_t *)((uint32_t)(&(SYSCTL0->PDRUNCFG0_SET)) + (…
29 #define SYSCTL0_PDRCFGCLR_REG(x) (*((volatile uint32_t *)((uint32_t)(&(SYSCTL0->PDRUNCFG0_CLR)) + (…
243 #define SYSCTL0_TUPLE_REG(reg) (*((volatile uint32_t *)(((uint32_t)(SYSCTL0)) + (((uint32_t)(reg)) …
Dfsl_clock.c1370 …SYSCTL0->PDRUNCFG0_SET = SYSCTL0_PDRUNCFG0_SYSPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_SYSPLLANA_PD_MASK; in CLOCK_InitSysPll()
1412 …SYSCTL0->PDRUNCFG0_CLR = SYSCTL0_PDRUNCFG0_SYSPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_SYSPLLANA_PD_MASK; in CLOCK_InitSysPll()
1460 …SYSCTL0->PDRUNCFG0_SET = SYSCTL0_PDRUNCFG0_AUDPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_AUDPLLANA_PD_MASK; in CLOCK_InitAudioPll()
1503 …SYSCTL0->PDRUNCFG0_CLR = SYSCTL0_PDRUNCFG0_AUDPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_AUDPLLANA_PD_MASK; in CLOCK_InitAudioPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_power.c354 SYSCTL0->PDSLEEPCFG0 = in POWER_EnterRbb()
355 …(SYSCTL0->PDRUNCFG0 | SYSCTL0_PDSLEEPCFG0_MAINCLK_SHUTOFF_MASK) & ~SYSCTL0_PDSLEEPCFG0_RBB_PD_MASK; in POWER_EnterRbb()
356 SYSCTL0->PDSLEEPCFG1 = SYSCTL0->PDRUNCFG1; in POWER_EnterRbb()
357 SYSCTL0->PDSLEEPCFG2 = SYSCTL0->PDRUNCFG2; in POWER_EnterRbb()
358 SYSCTL0->PDSLEEPCFG3 = SYSCTL0->PDRUNCFG3; in POWER_EnterRbb()
359 SYSCTL0->PDWAKECFG = SYSCTL0_PDWAKECFG_RBBKEEPST_MASK; in POWER_EnterRbb()
365 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMC_PMIC_IRQn - 32U); in POWER_EnterRbb()
374 SYSCTL0->STARTEN1_CLR = 1UL << ((uint32_t)PMC_PMIC_IRQn - 32U); in POWER_EnterRbb()
375 SYSCTL0->PDWAKECFG = 0; in POWER_EnterRbb()
401 SYSCTL0->PDSLEEPCFG0 = in POWER_EnterFbb()
[all …]
Dfsl_clock.c1189 assert(((SYSCTL0->PDRUNCFG0 & SYSCTL0_PDRUNCFG0_FFRO_PD_MASK) == 0UL) && in CLOCK_EnableFfroClk()
1190 ((SYSCTL0->PDRUNCFG1 & SYSCTL0_PDRUNCFG1_ROM_PD_MASK) == 0UL)); in CLOCK_EnableFfroClk()
1231 assert(((SYSCTL0->PDRUNCFG0 & SYSCTL0_PDRUNCFG0_SFRO_PD_MASK) == 0UL) && in CLOCK_EnableSfroClk()
1232 ((SYSCTL0->PDRUNCFG1 & SYSCTL0_PDRUNCFG1_ROM_PD_MASK) == 0UL)); in CLOCK_EnableSfroClk()
1250 …SYSCTL0->PDRUNCFG0_SET = SYSCTL0_PDRUNCFG0_SYSPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_SYSPLLANA_PD_MASK; in CLOCK_InitSysPll()
1292 …SYSCTL0->PDRUNCFG0_CLR = SYSCTL0_PDRUNCFG0_SYSPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_SYSPLLANA_PD_MASK; in CLOCK_InitSysPll()
1338 …SYSCTL0->PDRUNCFG0_SET = SYSCTL0_PDRUNCFG0_AUDPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_AUDPLLANA_PD_MASK; in CLOCK_InitAudioPll()
1381 …SYSCTL0->PDRUNCFG0_CLR = SYSCTL0_PDRUNCFG0_AUDPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_AUDPLLANA_PD_MASK; in CLOCK_InitAudioPll()
Dfsl_dsp.h79 SYSCTL0->DSPSTALL = 0x0; in DSP_Start()
87 SYSCTL0->DSPSTALL = 0x1; in DSP_Stop()
Dfsl_power.h27 #define SYSCTL0_PDRCFGSET_REG(x) (*((volatile uint32_t *)((uint32_t)(&(SYSCTL0->PDRUNCFG0_SET)) + (…
28 #define SYSCTL0_PDRCFGCLR_REG(x) (*((volatile uint32_t *)((uint32_t)(&(SYSCTL0->PDRUNCFG0_CLR)) + (…
212 #define SYSCTL0_TUPLE_REG(reg) (*((volatile uint32_t *)(((uint32_t)(SYSCTL0)) + (((uint32_t)(reg)) …
Dfsl_dsp.c43 …if ((SYSCTL0->PDRUNCFG1 & (SYSCTL0_PDRUNCFG1_DSPCACHE_REGF_APD_MASK | SYSCTL0_PDRUNCFG1_DSPCACHE_R… in DSP_Init()
Dfsl_clock.h1183 …SYSCTL0->PDRUNCFG0_SET = SYSCTL0_PDRUNCFG0_SYSPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_SYSPLLANA_PD_MASK; in CLOCK_DeinitSysPll()
1210 …SYSCTL0->PDRUNCFG0_SET = SYSCTL0_PDRUNCFG0_AUDPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_AUDPLLANA_PD_MASK; in CLOCK_DeinitAudioPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_power.c354 SYSCTL0->PDSLEEPCFG0 = in POWER_EnterRbb()
355 …(SYSCTL0->PDRUNCFG0 | SYSCTL0_PDSLEEPCFG0_MAINCLK_SHUTOFF_MASK) & ~SYSCTL0_PDSLEEPCFG0_RBB_PD_MASK; in POWER_EnterRbb()
356 SYSCTL0->PDSLEEPCFG1 = SYSCTL0->PDRUNCFG1; in POWER_EnterRbb()
357 SYSCTL0->PDSLEEPCFG2 = SYSCTL0->PDRUNCFG2; in POWER_EnterRbb()
358 SYSCTL0->PDSLEEPCFG3 = SYSCTL0->PDRUNCFG3; in POWER_EnterRbb()
359 SYSCTL0->PDWAKECFG = SYSCTL0_PDWAKECFG_RBBKEEPST_MASK; in POWER_EnterRbb()
365 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMC_PMIC_IRQn - 32U); in POWER_EnterRbb()
374 SYSCTL0->STARTEN1_CLR = 1UL << ((uint32_t)PMC_PMIC_IRQn - 32U); in POWER_EnterRbb()
375 SYSCTL0->PDWAKECFG = 0; in POWER_EnterRbb()
401 SYSCTL0->PDSLEEPCFG0 = in POWER_EnterFbb()
[all …]
Dfsl_clock.c1189 assert(((SYSCTL0->PDRUNCFG0 & SYSCTL0_PDRUNCFG0_FFRO_PD_MASK) == 0UL) && in CLOCK_EnableFfroClk()
1190 ((SYSCTL0->PDRUNCFG1 & SYSCTL0_PDRUNCFG1_ROM_PD_MASK) == 0UL)); in CLOCK_EnableFfroClk()
1231 assert(((SYSCTL0->PDRUNCFG0 & SYSCTL0_PDRUNCFG0_SFRO_PD_MASK) == 0UL) && in CLOCK_EnableSfroClk()
1232 ((SYSCTL0->PDRUNCFG1 & SYSCTL0_PDRUNCFG1_ROM_PD_MASK) == 0UL)); in CLOCK_EnableSfroClk()
1250 …SYSCTL0->PDRUNCFG0_SET = SYSCTL0_PDRUNCFG0_SYSPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_SYSPLLANA_PD_MASK; in CLOCK_InitSysPll()
1292 …SYSCTL0->PDRUNCFG0_CLR = SYSCTL0_PDRUNCFG0_SYSPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_SYSPLLANA_PD_MASK; in CLOCK_InitSysPll()
1338 …SYSCTL0->PDRUNCFG0_SET = SYSCTL0_PDRUNCFG0_AUDPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_AUDPLLANA_PD_MASK; in CLOCK_InitAudioPll()
1381 …SYSCTL0->PDRUNCFG0_CLR = SYSCTL0_PDRUNCFG0_AUDPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_AUDPLLANA_PD_MASK; in CLOCK_InitAudioPll()
Dfsl_power.h27 #define SYSCTL0_PDRCFGSET_REG(x) (*((volatile uint32_t *)((uint32_t)(&(SYSCTL0->PDRUNCFG0_SET)) + (…
28 #define SYSCTL0_PDRCFGCLR_REG(x) (*((volatile uint32_t *)((uint32_t)(&(SYSCTL0->PDRUNCFG0_CLR)) + (…
212 #define SYSCTL0_TUPLE_REG(reg) (*((volatile uint32_t *)(((uint32_t)(SYSCTL0)) + (((uint32_t)(reg)) …
Dfsl_clock.h1183 …SYSCTL0->PDRUNCFG0_SET = SYSCTL0_PDRUNCFG0_SYSPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_SYSPLLANA_PD_MASK; in CLOCK_DeinitSysPll()
1210 …SYSCTL0->PDRUNCFG0_SET = SYSCTL0_PDRUNCFG0_AUDPLLLDO_PD_MASK | SYSCTL0_PDRUNCFG0_AUDPLLANA_PD_MASK; in CLOCK_DeinitAudioPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
Dsystem_MIMXRT595S_cm33.c116 SYSCTL0->DSPSTALL = SYSCTL0_DSPSTALL_DSPSTALL_MASK; in SystemInit()
117 …SYSCTL0->PDSLEEPCFG0 |= SYSCTL0_PDSLEEPCFG0_HSPAD_FSPI0_REF_PD_MASK | SYSCTL0_PDSLEEPCFG0_HSPAD_SD… in SystemInit()
119 SYSCTL0->PDSLEEPCFG1 |= SYSCTL0_PDSLEEPCFG1_HSPAD_SDIO1_REF_PD_MASK; in SystemInit()
120 …SYSCTL0->PDRUNCFG0_SET = SYSCTL0_PDRUNCFG0_HSPAD_FSPI0_REF_PD_MASK | SYSCTL0_PDRUNCFG0_HSPAD_SDIO0… in SystemInit()
122 SYSCTL0->PDRUNCFG1_SET = SYSCTL0_PDRUNCFG1_HSPAD_SDIO1_REF_PD_MASK; in SystemInit()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
Dsystem_MIMXRT555S.c115 SYSCTL0->DSPSTALL = SYSCTL0_DSPSTALL_DSPSTALL_MASK; in SystemInit()
116 …SYSCTL0->PDSLEEPCFG0 |= SYSCTL0_PDSLEEPCFG0_HSPAD_FSPI0_REF_PD_MASK | SYSCTL0_PDSLEEPCFG0_HSPAD_SD… in SystemInit()
118 SYSCTL0->PDSLEEPCFG1 |= SYSCTL0_PDSLEEPCFG1_HSPAD_SDIO1_REF_PD_MASK; in SystemInit()
119 …SYSCTL0->PDRUNCFG0_SET = SYSCTL0_PDRUNCFG0_HSPAD_FSPI0_REF_PD_MASK | SYSCTL0_PDRUNCFG0_HSPAD_SDIO0… in SystemInit()
121 SYSCTL0->PDRUNCFG1_SET = SYSCTL0_PDRUNCFG1_HSPAD_SDIO1_REF_PD_MASK; in SystemInit()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
Dsystem_MIMXRT533S.c115 SYSCTL0->DSPSTALL = SYSCTL0_DSPSTALL_DSPSTALL_MASK; in SystemInit()
116 …SYSCTL0->PDSLEEPCFG0 |= SYSCTL0_PDSLEEPCFG0_HSPAD_FSPI0_REF_PD_MASK | SYSCTL0_PDSLEEPCFG0_HSPAD_SD… in SystemInit()
118 SYSCTL0->PDSLEEPCFG1 |= SYSCTL0_PDSLEEPCFG1_HSPAD_SDIO1_REF_PD_MASK; in SystemInit()
119 …SYSCTL0->PDRUNCFG0_SET = SYSCTL0_PDRUNCFG0_HSPAD_FSPI0_REF_PD_MASK | SYSCTL0_PDRUNCFG0_HSPAD_SDIO0… in SystemInit()
121 SYSCTL0->PDRUNCFG1_SET = SYSCTL0_PDRUNCFG1_HSPAD_SDIO1_REF_PD_MASK; in SystemInit()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
Dsystem_MIMXRT685S_cm33.c113 SYSCTL0->DSPSTALL = SYSCTL0_DSPSTALL_DSPSTALL_MASK; in SystemInit()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
Dsystem_MIMXRT633S.c112 SYSCTL0->DSPSTALL = SYSCTL0_DSPSTALL_DSPSTALL_MASK; in SystemInit()

12