Home
last modified time | relevance | path

Searched refs:SDIO1FCLKSEL_OFFSET (Results 1 – 8 of 8) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_clock.h425 #define SDIO1FCLKSEL_OFFSET 0x690 macro
625 …kMAIN_CLK_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 0), /*!< Attach MAIN_CLK to SDIO1…
626 …kMAIN_PLL_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 1), /*!< Attach MAIN_PLL to SDIO1…
627 …kAUX0_PLL_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 2), /*!< Attach AUX0_PLL to SDIO1…
628 …kFFRO_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 3), /*!< Attach FFRO to SDIO1_CLK…
629 …kAUX1_PLL_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 4), /*!< Attach AUX1_PLL to SDIO1…
630 …kNONE_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 7), /*!< Attach NONE to SDIO1_CLK…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_clock.h425 #define SDIO1FCLKSEL_OFFSET 0x690 macro
625 …kMAIN_CLK_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 0), /*!< Attach MAIN_CLK to SDIO1…
626 …kMAIN_PLL_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 1), /*!< Attach MAIN_PLL to SDIO1…
627 …kAUX0_PLL_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 2), /*!< Attach AUX0_PLL to SDIO1…
628 …kFFRO_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 3), /*!< Attach FFRO to SDIO1_CLK…
629 …kAUX1_PLL_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 4), /*!< Attach AUX1_PLL to SDIO1…
630 …kNONE_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 7), /*!< Attach NONE to SDIO1_CLK…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_clock.h532 #define SDIO1FCLKSEL_OFFSET 0x690 macro
691 …kMAIN_CLK_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 0), /*!< Attach MAIN_CLK to SDIO1…
692 …kMAIN_PLL_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 1), /*!< Attach MAIN_PLL to SDIO1…
693 …kAUX0_PLL_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 2), /*!< Attach AUX0_PLL to SDIO1…
694 …kFRO_DIV2_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 3), /*!< Attach FRO_DIV2 to SDIO1…
695 …kAUX1_PLL_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 4), /*!< Attach AUX1_PLL to SDIO1…
696 …kNONE_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 7), /*!< Attach NONE to SDIO1_CLK…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_clock.h532 #define SDIO1FCLKSEL_OFFSET 0x690 macro
691 …kMAIN_CLK_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 0), /*!< Attach MAIN_CLK to SDIO1…
692 …kMAIN_PLL_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 1), /*!< Attach MAIN_PLL to SDIO1…
693 …kAUX0_PLL_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 2), /*!< Attach AUX0_PLL to SDIO1…
694 …kFRO_DIV2_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 3), /*!< Attach FRO_DIV2 to SDIO1…
695 …kAUX1_PLL_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 4), /*!< Attach AUX1_PLL to SDIO1…
696 …kNONE_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 7), /*!< Attach NONE to SDIO1_CLK…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_clock.h532 #define SDIO1FCLKSEL_OFFSET 0x690 macro
691 …kMAIN_CLK_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 0), /*!< Attach MAIN_CLK to SDIO1…
692 …kMAIN_PLL_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 1), /*!< Attach MAIN_PLL to SDIO1…
693 …kAUX0_PLL_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 2), /*!< Attach AUX0_PLL to SDIO1…
694 …kFRO_DIV2_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 3), /*!< Attach FRO_DIV2 to SDIO1…
695 …kAUX1_PLL_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 4), /*!< Attach AUX1_PLL to SDIO1…
696 …kNONE_to_SDIO1_CLK = CLKCTL0_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 7), /*!< Attach NONE to SDIO1_CLK…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_clock.h938 #define SDIO1FCLKSEL_OFFSET 0x280 macro
1625 …CLKCTL4_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 0), /*!< Attach Media VDDN base clock to SDIO1 Functional …
1627 …CLKCTL4_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 1), /*!< Attach Audio PLL PFD0 clock to SDIO1 Functional C…
1629 …CLKCTL4_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 2), /*!< Attach FRO0 max clock to SDIO1 Functional Clock. …
1631 …CLKCTL4_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 3), /*!< Attach Main PLL PFD1 clock to SDIO1 Functional Cl…
1632 …kNONE_to_SDIO1 = CLKCTL4_TUPLE_MUXA_NONE(SDIO1FCLKSEL_OFFSET, 0), /*!< Attach NONE to SDIO1 Functi…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_clock.h938 #define SDIO1FCLKSEL_OFFSET 0x280 macro
1625 …CLKCTL4_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 0), /*!< Attach Media VDDN base clock to SDIO1 Functional …
1627 …CLKCTL4_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 1), /*!< Attach Audio PLL PFD0 clock to SDIO1 Functional C…
1629 …CLKCTL4_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 2), /*!< Attach FRO0 max clock to SDIO1 Functional Clock. …
1631 …CLKCTL4_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 3), /*!< Attach Main PLL PFD1 clock to SDIO1 Functional Cl…
1632 …kNONE_to_SDIO1 = CLKCTL4_TUPLE_MUXA_NONE(SDIO1FCLKSEL_OFFSET, 0), /*!< Attach NONE to SDIO1 Functi…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_clock.h938 #define SDIO1FCLKSEL_OFFSET 0x280 macro
1625 …CLKCTL4_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 0), /*!< Attach Media VDDN base clock to SDIO1 Functional …
1627 …CLKCTL4_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 1), /*!< Attach Audio PLL PFD0 clock to SDIO1 Functional C…
1629 …CLKCTL4_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 2), /*!< Attach FRO0 max clock to SDIO1 Functional Clock. …
1631 …CLKCTL4_TUPLE_MUXA(SDIO1FCLKSEL_OFFSET, 3), /*!< Attach Main PLL PFD1 clock to SDIO1 Functional Cl…
1632 …kNONE_to_SDIO1 = CLKCTL4_TUPLE_MUXA_NONE(SDIO1FCLKSEL_OFFSET, 0), /*!< Attach NONE to SDIO1 Functi…