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Searched refs:RST_CTL3_PSCCTL0 (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_reset.h58 #define RST_CTL3_PSCCTL0 8 macro
189 kIOPCTL1_RST_SHIFT_RSTn = (RST_CTL3_PSCCTL0 << 8) | 0U, /*!< IOPCTL1 reset control */
190 kCPU1_RST_SHIFT_RSTn = (RST_CTL3_PSCCTL0 << 8) | 31U, /*!< CPU1 reset control */
Dfsl_reset.c100 case RST_CTL3_PSCCTL0: in RESET_SetPeripheralReset()
201 case RST_CTL3_PSCCTL0: in RESET_ClearPeripheralReset()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_reset.h58 #define RST_CTL3_PSCCTL0 8 macro
189 kIOPCTL1_RST_SHIFT_RSTn = (RST_CTL3_PSCCTL0 << 8) | 0U, /*!< IOPCTL1 reset control */
190 kCPU1_RST_SHIFT_RSTn = (RST_CTL3_PSCCTL0 << 8) | 31U, /*!< CPU1 reset control */
Dfsl_reset.c100 case RST_CTL3_PSCCTL0: in RESET_SetPeripheralReset()
201 case RST_CTL3_PSCCTL0: in RESET_ClearPeripheralReset()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_reset.h58 #define RST_CTL3_PSCCTL0 8 macro
189 kIOPCTL1_RST_SHIFT_RSTn = (RST_CTL3_PSCCTL0 << 8) | 0U, /*!< IOPCTL1 reset control */
190 kCPU1_RST_SHIFT_RSTn = (RST_CTL3_PSCCTL0 << 8) | 31U, /*!< CPU1 reset control */
Dfsl_reset.c100 case RST_CTL3_PSCCTL0: in RESET_SetPeripheralReset()
201 case RST_CTL3_PSCCTL0: in RESET_ClearPeripheralReset()