1 /* 2 * Copyright 2022 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #include "fsl_common.h" 9 #include "fsl_reset.h" 10 11 /******************************************************************************* 12 * Definitions 13 ******************************************************************************/ 14 /* Component ID definition, used by tools. */ 15 #ifndef FSL_COMPONENT_ID 16 #define FSL_COMPONENT_ID "platform.drivers.reset" 17 #endif 18 19 /******************************************************************************* 20 * Variables 21 ******************************************************************************/ 22 23 /******************************************************************************* 24 * Prototypes 25 ******************************************************************************/ 26 27 /******************************************************************************* 28 * Code 29 ******************************************************************************/ 30 /*! 31 * brief Assert reset to peripheral. 32 * 33 * Asserts reset signal to specified peripheral module. 34 * 35 * param peripheral Assert reset to this peripheral. The enum argument contains encoding of reset register 36 * and reset bit position in the reset register. 37 */ RESET_SetPeripheralReset(reset_ip_name_t peripheral)38void RESET_SetPeripheralReset(reset_ip_name_t peripheral) 39 { 40 const uint32_t regIndex = ((uint32_t)peripheral & 0x0000FF00u) >> 8; 41 const uint32_t bitPos = ((uint32_t)peripheral & 0x000000FFu); 42 const uint32_t bitMask = 1UL << bitPos; 43 44 assert(bitPos < 32u); 45 46 switch (regIndex) 47 { 48 #if defined(FSL_RESET_DRIVER_COMPUTE) || defined(FSL_RESET_DRIVER_MEDIA) 49 case RST_CTL0_PSCCTL0: 50 RSTCTL0->PRSTCTL0_SET = bitMask; 51 while (0u == (RSTCTL0->PRSTCTL0 & bitMask)) 52 { 53 } 54 break; 55 case RST_CTL0_PSCCTL1: 56 RSTCTL0->PRSTCTL1_SET = bitMask; 57 while (0u == (RSTCTL0->PRSTCTL1 & bitMask)) 58 { 59 } 60 break; 61 case RST_CTL0_PSCCTL2: 62 RSTCTL0->PRSTCTL2_SET = bitMask; 63 while (0u == (RSTCTL0->PRSTCTL2 & bitMask)) 64 { 65 } 66 break; 67 case RST_CTL0_PSCCTL3: 68 RSTCTL0->PRSTCTL3_SET = bitMask; 69 while (0u == (RSTCTL0->PRSTCTL3 & bitMask)) 70 { 71 } 72 break; 73 case RST_CTL0_PSCCTL4: 74 RSTCTL0->PRSTCTL4_SET = bitMask; 75 while (0u == (RSTCTL0->PRSTCTL4 & bitMask)) 76 { 77 } 78 break; 79 case RST_CTL0_PSCCTL5: 80 RSTCTL0->PRSTCTL5_SET = bitMask; 81 while (0u == (RSTCTL0->PRSTCTL5 & bitMask)) 82 { 83 } 84 break; 85 #endif 86 #if defined(FSL_RESET_DRIVER_SENSE) || defined(FSL_RESET_DRIVER_MEDIA) 87 case RST_CTL1_PSCCTL0: 88 RSTCTL1->PRSTCTL0_SET = bitMask; 89 while (0u == (RSTCTL1->PRSTCTL0 & bitMask)) 90 { 91 } 92 break; 93 #endif 94 case RST_CTL2_PSCCTL0: 95 RSTCTL2->PRSTCTL0_SET = bitMask; 96 while (0u == (RSTCTL2->PRSTCTL0 & bitMask)) 97 { 98 } 99 break; 100 case RST_CTL3_PSCCTL0: 101 RSTCTL3->PRSTCTL0_SET = bitMask; 102 while (0u == (RSTCTL3->PRSTCTL0 & bitMask)) 103 { 104 } 105 break; 106 case RST_CTL3_PSCCTL1: 107 RSTCTL3->PRSTCTL1_SET = bitMask; 108 while (0u == (RSTCTL3->PRSTCTL1 & bitMask)) 109 { 110 } 111 break; 112 case RST_CTL4_PSCCTL0: 113 RSTCTL4->PRSTCTL0_SET = bitMask; 114 while (0u == (RSTCTL4->PRSTCTL0 & bitMask)) 115 { 116 } 117 break; 118 case RST_CTL4_PSCCTL1: 119 RSTCTL4->PRSTCTL1_SET = bitMask; 120 while (0u == (RSTCTL4->PRSTCTL1 & bitMask)) 121 { 122 } 123 break; 124 default: 125 /* Added comments to prevent the violation of MISRA C-2012 rule. */ 126 break; 127 } 128 } 129 130 /*! 131 * brief Clear reset to peripheral. 132 * 133 * Clears reset signal to specified peripheral module, allows it to operate. 134 * 135 * param peripheral Clear reset to this peripheral. The enum argument contains encoding of reset register 136 * and reset bit position in the reset register. 137 */ RESET_ClearPeripheralReset(reset_ip_name_t peripheral)138void RESET_ClearPeripheralReset(reset_ip_name_t peripheral) 139 { 140 const uint32_t regIndex = ((uint32_t)peripheral & 0x0000FF00u) >> 8; 141 const uint32_t bitPos = ((uint32_t)peripheral & 0x000000FFu); 142 const uint32_t bitMask = 1UL << bitPos; 143 144 assert(bitPos < 32u); 145 146 switch (regIndex) 147 { 148 #if defined(FSL_RESET_DRIVER_COMPUTE) || defined(FSL_RESET_DRIVER_MEDIA) 149 case RST_CTL0_PSCCTL0: 150 RSTCTL0->PRSTCTL0_CLR = bitMask; 151 while (bitMask == (RSTCTL0->PRSTCTL0 & bitMask)) 152 { 153 } 154 break; 155 case RST_CTL0_PSCCTL1: 156 RSTCTL0->PRSTCTL1_CLR = bitMask; 157 while (bitMask == (RSTCTL0->PRSTCTL1 & bitMask)) 158 { 159 } 160 break; 161 case RST_CTL0_PSCCTL2: 162 RSTCTL0->PRSTCTL2_CLR = bitMask; 163 while (bitMask == (RSTCTL0->PRSTCTL2 & bitMask)) 164 { 165 } 166 break; 167 case RST_CTL0_PSCCTL3: 168 RSTCTL0->PRSTCTL3_CLR = bitMask; 169 while (bitMask == (RSTCTL0->PRSTCTL3 & bitMask)) 170 { 171 } 172 break; 173 case RST_CTL0_PSCCTL4: 174 RSTCTL0->PRSTCTL4_CLR = bitMask; 175 while (bitMask == (RSTCTL0->PRSTCTL4 & bitMask)) 176 { 177 } 178 break; 179 case RST_CTL0_PSCCTL5: 180 RSTCTL0->PRSTCTL5_CLR = bitMask; 181 while (bitMask == (RSTCTL0->PRSTCTL5 & bitMask)) 182 { 183 } 184 break; 185 #endif 186 #if defined(FSL_RESET_DRIVER_SENSE) || defined(FSL_RESET_DRIVER_MEDIA) 187 case RST_CTL1_PSCCTL0: 188 RSTCTL1->PRSTCTL0_CLR = bitMask; 189 while (bitMask == (RSTCTL1->PRSTCTL0 & bitMask)) 190 { 191 } 192 break; 193 #endif 194 195 case RST_CTL2_PSCCTL0: 196 RSTCTL2->PRSTCTL0_CLR = bitMask; 197 while (bitMask == (RSTCTL2->PRSTCTL0 & bitMask)) 198 { 199 } 200 break; 201 case RST_CTL3_PSCCTL0: 202 RSTCTL3->PRSTCTL0_CLR = bitMask; 203 while (bitMask == (RSTCTL3->PRSTCTL0 & bitMask)) 204 { 205 } 206 break; 207 case RST_CTL3_PSCCTL1: 208 RSTCTL3->PRSTCTL1_CLR = bitMask; 209 while (bitMask == (RSTCTL3->PRSTCTL1 & bitMask)) 210 { 211 } 212 break; 213 case RST_CTL4_PSCCTL0: 214 RSTCTL4->PRSTCTL0_CLR = bitMask; 215 while (bitMask == (RSTCTL4->PRSTCTL0 & bitMask)) 216 { 217 } 218 break; 219 case RST_CTL4_PSCCTL1: 220 RSTCTL4->PRSTCTL1_CLR = bitMask; 221 while (bitMask == (RSTCTL4->PRSTCTL1 & bitMask)) 222 { 223 } 224 break; 225 default: 226 /* Added comments to prevent the violation of MISRA C-2012 rule. */ 227 break; 228 } 229 } 230 231 /*! 232 * brief Reset peripheral module. 233 * 234 * Reset peripheral module. 235 * 236 * param peripheral Peripheral to reset. The enum argument contains encoding of reset register 237 * and reset bit position in the reset register. 238 */ RESET_PeripheralReset(reset_ip_name_t peripheral)239void RESET_PeripheralReset(reset_ip_name_t peripheral) 240 { 241 RESET_SetPeripheralReset(peripheral); 242 RESET_ClearPeripheralReset(peripheral); 243 } 244