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Searched refs:MCG_C2_IRCS_MASK (Results 1 – 25 of 140) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC041/drivers/
Dfsl_clock.c31 #define MCG_C2_IRCS_VAL ((MCG->C2 & MCG_C2_IRCS_MASK) >> MCG_C2_IRCS_SHIFT)
375 MCG->C2 = (MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs); in CLOCK_SetMcgliteConfig()
409 MCG->C2 = ((MCG->C2 & MCG_C2_IRCS_MASK) | (uint8_t)config->workMode); in CLOCK_InitOsc0()
428 MCG->C2 &= MCG_C2_IRCS_MASK; in CLOCK_DeinitOsc0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC142/drivers/
Dfsl_clock.c30 #define MCG_C2_IRCS_VAL ((MCG->C2 & MCG_C2_IRCS_MASK) >> MCG_C2_IRCS_SHIFT)
416 MCG->C2 = (uint8_t)((MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs)); in CLOCK_SetMcgliteConfig()
452 MCG->C2 = ((MCG->C2 & MCG_C2_IRCS_MASK) | MCG_C2_RANGE0(range) | (uint8_t)config->workMode); in CLOCK_InitOsc0()
471 MCG->C2 &= MCG_C2_IRCS_MASK; in CLOCK_DeinitOsc0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL17Z644/drivers/
Dfsl_clock.c31 #define MCG_C2_IRCS_VAL ((MCG->C2 & MCG_C2_IRCS_MASK) >> MCG_C2_IRCS_SHIFT)
417 MCG->C2 = (uint8_t)((MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs)); in CLOCK_SetMcgliteConfig()
453 MCG->C2 = ((MCG->C2 & MCG_C2_IRCS_MASK) | MCG_C2_RANGE0(range) | (uint8_t)config->workMode); in CLOCK_InitOsc0()
472 MCG->C2 &= MCG_C2_IRCS_MASK; in CLOCK_DeinitOsc0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC141/drivers/
Dfsl_clock.c30 #define MCG_C2_IRCS_VAL ((MCG->C2 & MCG_C2_IRCS_MASK) >> MCG_C2_IRCS_SHIFT)
416 MCG->C2 = (uint8_t)((MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs)); in CLOCK_SetMcgliteConfig()
452 MCG->C2 = ((MCG->C2 & MCG_C2_IRCS_MASK) | MCG_C2_RANGE0(range) | (uint8_t)config->workMode); in CLOCK_InitOsc0()
471 MCG->C2 &= MCG_C2_IRCS_MASK; in CLOCK_DeinitOsc0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC444/drivers/
Dfsl_clock.c30 #define MCG_C2_IRCS_VAL ((MCG->C2 & MCG_C2_IRCS_MASK) >> MCG_C2_IRCS_SHIFT)
451 MCG->C2 = (uint8_t)((MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs)); in CLOCK_SetMcgliteConfig()
487 MCG->C2 = ((MCG->C2 & MCG_C2_IRCS_MASK) | MCG_C2_RANGE0(range) | (uint8_t)config->workMode); in CLOCK_InitOsc0()
506 MCG->C2 &= MCG_C2_IRCS_MASK; in CLOCK_DeinitOsc0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC443/drivers/
Dfsl_clock.c30 #define MCG_C2_IRCS_VAL ((MCG->C2 & MCG_C2_IRCS_MASK) >> MCG_C2_IRCS_SHIFT)
451 MCG->C2 = (uint8_t)((MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs)); in CLOCK_SetMcgliteConfig()
487 MCG->C2 = ((MCG->C2 & MCG_C2_IRCS_MASK) | MCG_C2_RANGE0(range) | (uint8_t)config->workMode); in CLOCK_InitOsc0()
506 MCG->C2 &= MCG_C2_IRCS_MASK; in CLOCK_DeinitOsc0()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B31A/drivers/
Dfsl_clock.c31 #define MCG_C2_IRCS_VAL ((MCG->C2 & MCG_C2_IRCS_MASK) >> MCG_C2_IRCS_SHIFT)
450 MCG->C2 = (uint8_t)((MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs)); in CLOCK_SetMcgliteConfig()
486 MCG->C2 = ((MCG->C2 & MCG_C2_IRCS_MASK) | MCG_C2_RANGE0(range) | (uint8_t)config->workMode); in CLOCK_InitOsc0()
505 MCG->C2 &= MCG_C2_IRCS_MASK; in CLOCK_DeinitOsc0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/drivers/
Dfsl_clock.c30 #define MCG_C2_IRCS_VAL ((MCG->C2 & MCG_C2_IRCS_MASK) >> MCG_C2_IRCS_SHIFT)
451 MCG->C2 = (uint8_t)((MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs)); in CLOCK_SetMcgliteConfig()
487 MCG->C2 = ((MCG->C2 & MCG_C2_IRCS_MASK) | MCG_C2_RANGE0(range) | (uint8_t)config->workMode); in CLOCK_InitOsc0()
506 MCG->C2 &= MCG_C2_IRCS_MASK; in CLOCK_DeinitOsc0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/drivers/
Dfsl_clock.c30 #define MCG_C2_IRCS_VAL ((MCG->C2 & MCG_C2_IRCS_MASK) >> MCG_C2_IRCS_SHIFT)
451 MCG->C2 = (uint8_t)((MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs)); in CLOCK_SetMcgliteConfig()
487 MCG->C2 = ((MCG->C2 & MCG_C2_IRCS_MASK) | MCG_C2_RANGE0(range) | (uint8_t)config->workMode); in CLOCK_InitOsc0()
506 MCG->C2 &= MCG_C2_IRCS_MASK; in CLOCK_DeinitOsc0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC243/drivers/
Dfsl_clock.c30 #define MCG_C2_IRCS_VAL ((MCG->C2 & MCG_C2_IRCS_MASK) >> MCG_C2_IRCS_SHIFT)
451 MCG->C2 = (uint8_t)((MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs)); in CLOCK_SetMcgliteConfig()
487 MCG->C2 = ((MCG->C2 & MCG_C2_IRCS_MASK) | MCG_C2_RANGE0(range) | (uint8_t)config->workMode); in CLOCK_InitOsc0()
506 MCG->C2 &= MCG_C2_IRCS_MASK; in CLOCK_DeinitOsc0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC242/drivers/
Dfsl_clock.c30 #define MCG_C2_IRCS_VAL ((MCG->C2 & MCG_C2_IRCS_MASK) >> MCG_C2_IRCS_SHIFT)
449 MCG->C2 = (uint8_t)((MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs)); in CLOCK_SetMcgliteConfig()
485 MCG->C2 = ((MCG->C2 & MCG_C2_IRCS_MASK) | MCG_C2_RANGE0(range) | (uint8_t)config->workMode); in CLOCK_InitOsc0()
504 MCG->C2 &= MCG_C2_IRCS_MASK; in CLOCK_DeinitOsc0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC143/drivers/
Dfsl_clock.c30 #define MCG_C2_IRCS_VAL ((MCG->C2 & MCG_C2_IRCS_MASK) >> MCG_C2_IRCS_SHIFT)
451 MCG->C2 = (uint8_t)((MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs)); in CLOCK_SetMcgliteConfig()
487 MCG->C2 = ((MCG->C2 & MCG_C2_IRCS_MASK) | MCG_C2_RANGE0(range) | (uint8_t)config->workMode); in CLOCK_InitOsc0()
506 MCG->C2 &= MCG_C2_IRCS_MASK; in CLOCK_DeinitOsc0()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B11A/drivers/
Dfsl_clock.c31 #define MCG_C2_IRCS_VAL ((MCG->C2 & MCG_C2_IRCS_MASK) >> MCG_C2_IRCS_SHIFT)
450 MCG->C2 = (uint8_t)((MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs)); in CLOCK_SetMcgliteConfig()
486 MCG->C2 = ((MCG->C2 & MCG_C2_IRCS_MASK) | MCG_C2_RANGE0(range) | (uint8_t)config->workMode); in CLOCK_InitOsc0()
505 MCG->C2 &= MCG_C2_IRCS_MASK; in CLOCK_DeinitOsc0()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B21A/drivers/
Dfsl_clock.c31 #define MCG_C2_IRCS_VAL ((MCG->C2 & MCG_C2_IRCS_MASK) >> MCG_C2_IRCS_SHIFT)
450 MCG->C2 = (uint8_t)((MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs)); in CLOCK_SetMcgliteConfig()
486 MCG->C2 = ((MCG->C2 & MCG_C2_IRCS_MASK) | MCG_C2_RANGE0(range) | (uint8_t)config->workMode); in CLOCK_InitOsc0()
505 MCG->C2 &= MCG_C2_IRCS_MASK; in CLOCK_DeinitOsc0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL27Z644/drivers/
Dfsl_clock.c31 #define MCG_C2_IRCS_VAL ((MCG->C2 & MCG_C2_IRCS_MASK) >> MCG_C2_IRCS_SHIFT)
450 MCG->C2 = (uint8_t)((MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs)); in CLOCK_SetMcgliteConfig()
486 MCG->C2 = ((MCG->C2 & MCG_C2_IRCS_MASK) | MCG_C2_RANGE0(range) | (uint8_t)config->workMode); in CLOCK_InitOsc0()
505 MCG->C2 &= MCG_C2_IRCS_MASK; in CLOCK_DeinitOsc0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW41Z4/
Dsystem_MKW41Z4.c161 if ((MCG->C2 & MCG_C2_IRCS_MASK) == 0x00U) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW21Z4/
Dsystem_MKW21Z4.c160 if ((MCG->C2 & MCG_C2_IRCS_MASK) == 0x00U) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
Dsystem_MKV10Z1287.c155 if ((MCG->C2 & MCG_C2_IRCS_MASK) == 0x00U) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW31Z4/
Dsystem_MKW31Z4.c161 if ((MCG->C2 & MCG_C2_IRCS_MASK) == 0x00U) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
Dsystem_MKV10Z7.c157 if ((MCG->C2 & MCG_C2_IRCS_MASK) == 0x00U) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
Dsystem_MKV11Z7.c155 if ((MCG->C2 & MCG_C2_IRCS_MASK) == 0x00U) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/
Dsystem_MKL25Z4.c201 if ((MCG->C2 & MCG_C2_IRCS_MASK) == 0x00U) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
Dsystem_MK02F12810.c174 if ((MCG->C2 & MCG_C2_IRCS_MASK) == 0x00U) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/
Dsystem_MK22F12810.c180 if ((MCG->C2 & MCG_C2_IRCS_MASK) == 0x00U) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
Dsystem_MKV30F12810.c175 if ((MCG->C2 & MCG_C2_IRCS_MASK) == 0x00U) { in SystemCoreClockUpdate()

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