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Searched refs:LPTMR1_IRQn (Results 1 – 25 of 40) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MCXW716C/
Dfsl_pm_device.h412 #define PM_WSID_LPTMR1 PM_ENCODE_WAKEUP_SOURCE_ID(1UL, 0UL, LPTMR1_IRQn, 0UL)
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/KW45B41Z83/
Dfsl_pm_device.h412 #define PM_WSID_LPTMR1 PM_ENCODE_WAKEUP_SOURCE_ID(1UL, 0UL, LPTMR1_IRQn, 0UL)
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MCXW716A/
Dfsl_pm_device.h412 #define PM_WSID_LPTMR1 PM_ENCODE_WAKEUP_SOURCE_ID(1UL, 0UL, LPTMR1_IRQn, 0UL)
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/K32W1480/
Dfsl_pm_device.h412 #define PM_WSID_LPTMR1 PM_ENCODE_WAKEUP_SOURCE_ID(1UL, 0UL, LPTMR1_IRQn, 0UL)
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MCXN947/
Dfsl_pm_device.h687 …D_LPTMR1 PM_ENCODE_WAKEUP_SOURCE_ID(kWup_inputType_intMod, kWup_modID_LPTMR1, LPTMR1_IRQn, 0UL)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h108 LPTMR1_IRQn = 32, /**< LPTMR1 interrupt (INTMUX source IRQ0) */ enumerator
9949 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h108 LPTMR1_IRQn = 32, /**< LPTMR1 interrupt (INTMUX source IRQ0) */ enumerator
9949 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h107 LPTMR1_IRQn = 30, /**< LPTMR1 interrupt */ enumerator
13474 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn, LPTMR2_IRQn }
DK32L3A60_cm0plus.h112 LPTMR1_IRQn = 39, /**< LPTMR1 interrupt (INTMUX1 source IRQ7) */ enumerator
12766 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn, LPTMR2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h127 LPTMR1_IRQn = 37, /**< Low Power Timer */ enumerator
15413 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h128 LPTMR1_IRQn = 37, /**< Low Power Timer */ enumerator
15414 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h115 LPTMR1_IRQn = 35, /**< Low-Power Timer1 interrupt */ enumerator
21501 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h115 LPTMR1_IRQn = 35, /**< Low-Power Timer1 interrupt */ enumerator
23670 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h224 LPTMR1_IRQn = 144, /**< Low Power Timer 1 interrupt */ enumerator
39400 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h224 LPTMR1_IRQn = 144, /**< Low Power Timer 1 interrupt */ enumerator
39370 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h113 LPTMR1_IRQn = 35, /**< Low-Power Timer1 interrupt */ enumerator
24560 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn, NotAvail_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h226 LPTMR1_IRQn = 144, /**< Low Power Timer 1 interrupt */ enumerator
50061 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn }
DMCXN546_cm33_core1.h226 LPTMR1_IRQn = 144, /**< Low Power Timer 1 interrupt */ enumerator
50061 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h226 LPTMR1_IRQn = 144, /**< Low Power Timer 1 interrupt */ enumerator
50061 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn }
DMCXN547_cm33_core1.h226 LPTMR1_IRQn = 144, /**< Low Power Timer 1 interrupt */ enumerator
50061 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h226 LPTMR1_IRQn = 144, /**< Low Power Timer 1 interrupt */ enumerator
50542 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn }
DMCXN947_cm33_core0.h226 LPTMR1_IRQn = 144, /**< Low Power Timer 1 interrupt */ enumerator
50542 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h226 LPTMR1_IRQn = 144, /**< Low Power Timer 1 interrupt */ enumerator
50542 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn }
DMCXN946_cm33_core1.h226 LPTMR1_IRQn = 144, /**< Low Power Timer 1 interrupt */ enumerator
50542 #define LPTMR_IRQS { LPTMR0_IRQn, LPTMR1_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1182/
DMIMXRT1182.h125 LPTMR1_IRQn = 18, /**< LPTMR1 interrupt */ enumerator
53337 #define LPTMR_IRQS { NotAvail_IRQn, LPTMR1_IRQn }

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