| /hal_nxp-latest/mcux/mcux-sdk/drivers/smartcard/ |
| D | fsl_smartcard_usim.c | 121 base->IER &= ~USIM_IER_TDR_MASK; in SMARTCARD_USIM_CompleteSendData()
150 base->IER &= ~USIM_IER_RDR_MASK; in SMARTCARD_USIM_CompleteReceiveData()
197 base->IER |= USIM_IER_TDR_MASK; in SMARTCARD_USIM_StartSendData()
235 base->IER |= USIM_IER_RDR_MASK; in SMARTCARD_USIM_StartReceiveData()
287 base->IER |= USIM_IER_T0ERR_MASK | USIM_IER_PERR_MASK; in SMARTCARD_USIM_SetTransferType()
313 base->IER |= USIM_IER_T0ERR_MASK | USIM_IER_PERR_MASK; in SMARTCARD_USIM_SetTransferType()
343 base->IER |= USIM_IER_FRAMERR_MASK; in SMARTCARD_USIM_SetTransferType()
690 if (((base->IIR & USIM_IIR_CWT_MASK) != 0u) && ((base->IER & USIM_IER_CWT_MASK) != 0u)) in SMARTCARD_USIM_IRQHandler()
720 if (((base->IIR & USIM_IIR_BWT_MASK) != 0u) && ((base->IER & USIM_IER_BWT_MASK) != 0u)) in SMARTCARD_USIM_IRQHandler()
807 if (((base->IIR & USIM_IIR_RDR_MASK) != 0u) && ((base->IER & USIM_IER_RDR_MASK) != 0u)) in SMARTCARD_USIM_IRQHandler()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/rtc/ |
| D | fsl_rtc.c | 257 base->IER &= ~(RTC_IER_TSIC_MASK | RTC_IER_TSIE_MASK); in RTC_Init()
432 base->IER |= tmp32; in RTC_EnableInterrupts()
502 base->IER &= (uint32_t)(~tmp32); in RTC_DisableInterrupts()
551 if (0U != (RTC_IER_TIIE_MASK & base->IER)) in RTC_GetEnabledInterrupts()
555 if (0U != (RTC_IER_TOIE_MASK & base->IER)) in RTC_GetEnabledInterrupts()
559 if (0U != (RTC_IER_TAIE_MASK & base->IER)) in RTC_GetEnabledInterrupts()
563 if (0U != (RTC_IER_TSIE_MASK & base->IER)) in RTC_GetEnabledInterrupts()
568 if (0U != (RTC_IER_MOIE_MASK & base->IER)) in RTC_GetEnabledInterrupts()
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| /hal_nxp-latest/s32/drivers/s32ze/Mcu/src/ |
| D | Clock_Ip_Monitor.c | 259 …CmuFc->IER &= ~(CMU_FC_IER_FLLIE_MASK | CMU_FC_IER_FHHIE_MASK | CMU_FC_IER_FLLAIE_MASK | CMU_FC_IE… in Clock_Ip_DisableCmuFcFceRefCntLfrefHfref()
373 CmuFc->IER = Config->Interrupt; in Clock_Ip_SetCmuFcFceRefCntLfrefHfref()
455 CmuIerValue = Clock_Ip_apxCmu[IndexCmu]->IER & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
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| /hal_nxp-latest/s32/drivers/s32k1/Mcu/src/ |
| D | Clock_Ip_Monitor.c | 264 …CmuFc->IER &= ~(CMU_FC_IER_FLLIE_MASK | CMU_FC_IER_FHHIE_MASK | CMU_FC_IER_FLLAIE_MASK | CMU_FC_IE… in Clock_Ip_DisableCmuFcFceRefCntLfrefHfref()
358 CmuFc->IER = Config->Interrupt; in Clock_Ip_SetCmuFcFceRefCntLfrefHfref()
450 CmuIerValue = Clock_Ip_apxCmu[IndexCmu]->IER & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
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| /hal_nxp-latest/s32/drivers/s32k3/Mcu/src/ |
| D | Clock_Ip_Monitor.c | 296 …CmuFc->IER &= ~(CMU_FC_IER_FLLIE_MASK | CMU_FC_IER_FHHIE_MASK | CMU_FC_IER_FLLAIE_MASK | CMU_FC_IE… in Clock_Ip_DisableCmuFcFceRefCntLfrefHfref()
390 CmuFc->IER = Config->Interrupt; in Clock_Ip_SetCmuFcFceRefCntLfrefHfref()
483 CmuIerValue = Clock_Ip_apxCmu[IndexCmu]->IER & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/hscmp/ |
| D | fsl_hscmp.h | 261 base->IER |= mask; in HSCMP_EnableInterrupts()
272 base->IER &= ~mask; in HSCMP_DisableInterrupts()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/irtc/ |
| D | fsl_irtc.h | 349 base->IER |= (uint16_t)mask; in IRTC_EnableInterrupts()
375 base->IER &= ~(uint16_t)mask; in IRTC_DisableInterrupts()
402 uint32_t intsEnabled = base->IER; in IRTC_GetEnabledInterrupts()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/dac14/ |
| D | fsl_dac14.h | 296 base->IER |= mask; in DAC14_EnableInterrupts()
307 base->IER &= ~mask; in DAC14_DisableInterrupts()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/dac_1/ |
| D | fsl_dac.h | 311 base->IER |= mask; in DAC_EnableInterrupts()
322 base->IER &= ~mask; in DAC_DisableInterrupts()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/lpcmp/ |
| D | fsl_lpcmp.h | 387 base->IER |= mask; in LPCMP_EnableInterrupts()
398 base->IER &= ~mask; in LPCMP_DisableInterrupts()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/tdet/ |
| D | fsl_tdet.c | 491 base->IER |= mask; in TDET_EnableInterrupts()
519 base->IER &= ~mask; in TDET_DisableInterrupts()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/lpflexcomm/lpspi/ |
| D | fsl_lpspi.h | 637 base->IER |= mask; in LPSPI_EnableInterrupts()
652 base->IER &= ~mask; in LPSPI_DisableInterrupts()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/lpspi/ |
| D | fsl_lpspi.h | 650 base->IER |= mask; in LPSPI_EnableInterrupts()
665 base->IER &= ~mask; in LPSPI_DisableInterrupts()
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| /hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/ |
| D | S32K344_CMU_FM.h | 76 __IO uint32_t IER; /**< Interrupt Enable Register, offset: 0xC */ member
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| D | S32K344_CMU_FC.h | 78 __IO uint32_t IER; /**< Interrupt Enable Register, offset: 0x14 */ member
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| /hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/ |
| D | S32K118_CMU.h | 78 __IO uint32_t IER; /**< Interrupt Enable Register, offset: 0x14 */ member
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| D | S32K116_CMU.h | 78 __IO uint32_t IER; /**< Interrupt Enable Register, offset: 0x14 */ member
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| D | S32K148_RTC.h | 80 …__IO uint32_t IER; /**< RTC Interrupt Enable Register, offset: 0x1C … member
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| D | S32K142W_RTC.h | 80 …__IO uint32_t IER; /**< RTC Interrupt Enable Register, offset: 0x1C … member
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| D | S32K116_RTC.h | 80 …__IO uint32_t IER; /**< RTC Interrupt Enable Register, offset: 0x1C … member
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| D | S32K118_RTC.h | 80 …__IO uint32_t IER; /**< RTC Interrupt Enable Register, offset: 0x1C … member
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| D | S32K142_RTC.h | 80 …__IO uint32_t IER; /**< RTC Interrupt Enable Register, offset: 0x1C … member
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| D | S32K146_RTC.h | 80 …__IO uint32_t IER; /**< RTC Interrupt Enable Register, offset: 0x1C … member
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| D | S32K144W_RTC.h | 80 …__IO uint32_t IER; /**< RTC Interrupt Enable Register, offset: 0x1C … member
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| /hal_nxp-latest/s32/drivers/s32ze/Mcu/include/ |
| D | Clock_Ip_Specific.h | 254 uint32 IER; /**< Interrupt Enable Register, offset: 0x14 */ member
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