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Searched refs:FTM_SWOCTRL_CH6OCV_MASK (Results 1 – 25 of 71) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K142_FTM.h1216 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
1219 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
DS32K148_FTM.h1232 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
1235 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
DS32K118_FTM.h1208 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
1211 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
DS32K116_FTM.h1208 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
1211 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
DS32K146_FTM.h1224 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
1227 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
DS32K142W_FTM.h1216 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
1219 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
DS32K144W_FTM.h1216 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
1219 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
DS32K144_FTM.h1212 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
1215 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z4/
DMKE04Z4.h2209 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
2215 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE02Z4/
DMKE02Z4.h2197 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
2203 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z1284/
DMKE04Z1284.h2222 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
2228 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE06Z4/
DMKE06Z4.h2222 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
2228 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h4924 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
4930 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h3455 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
3461 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h3453 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
3459 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h4929 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
4935 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h4355 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
4361 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h4956 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
4962 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h4831 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
4837 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h5999 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
6005 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h5899 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
5905 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h6003 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
6009 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h6001 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
6007 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h5619 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
5625 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h5719 #define FTM_SWOCTRL_CH6OCV_MASK (0x4000U) macro
5725 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH6OCV_SHIFT)) & FTM_SWOCTRL_CH6OCV_MASK)

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