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Searched refs:FTM_SWOCTRL_CH4OCV_MASK (Results 1 – 25 of 74) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K142_FTM.h1206 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
1209 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
DS32K148_FTM.h1222 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
1225 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
DS32K118_FTM.h1198 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
1201 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
DS32K116_FTM.h1198 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
1201 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
DS32K146_FTM.h1214 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
1217 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
DS32K142W_FTM.h1206 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
1209 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
DS32K144W_FTM.h1206 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
1209 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
DS32K144_FTM.h1202 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
1205 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z4/
DMKE04Z4.h2195 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
2201 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE02Z4/
DMKE02Z4.h2183 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
2189 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z1284/
DMKE04Z1284.h2208 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
2214 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE06Z4/
DMKE06Z4.h2208 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
2214 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h4910 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
4916 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h3439 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
3445 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h3437 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
3443 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h4915 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
4921 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h4341 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
4347 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h3213 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
3219 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h4942 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
4948 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h3214 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
3220 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h4817 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
4823 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h3212 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
3218 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h5983 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
5989 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h5883 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
5889 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h5987 #define FTM_SWOCTRL_CH4OCV_MASK (0x1000U) macro
5993 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH4OCV_SHIFT)) & FTM_SWOCTRL_CH4OCV_MASK)

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