Home
last modified time | relevance | path

Searched refs:FTM_INVCTRL_INV1EN_MASK (Results 1 – 25 of 74) sorted by relevance

123

/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K142_FTM.h1127 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
1130 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
DS32K148_FTM.h1143 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
1146 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
DS32K118_FTM.h1119 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
1122 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
DS32K116_FTM.h1119 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
1122 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
DS32K146_FTM.h1135 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
1138 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
DS32K142W_FTM.h1127 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
1130 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
DS32K144W_FTM.h1127 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
1130 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
DS32K144_FTM.h1123 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
1126 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z4/
DMKE04Z4.h2086 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
2092 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE02Z4/
DMKE02Z4.h2074 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
2080 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z1284/
DMKE04Z1284.h2099 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
2105 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE06Z4/
DMKE06Z4.h2099 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
2105 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h4801 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
4807 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h3315 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
3321 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h3313 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
3319 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h4806 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
4812 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h4232 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
4238 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h3125 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
3131 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h4833 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
4839 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h3126 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
3132 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h4708 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
4714 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h3124 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
3130 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h5859 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
5865 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h5759 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
5765 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h5863 #define FTM_INVCTRL_INV1EN_MASK (0x2U) macro
5869 … (((uint32_t)(((uint32_t)(x)) << FTM_INVCTRL_INV1EN_SHIFT)) & FTM_INVCTRL_INV1EN_MASK)

123