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Searched refs:FTM_COMBINE_SYNCEN3_MASK (Results 1 – 25 of 71) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K142_FTM.h693 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
696 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
DS32K148_FTM.h709 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
712 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
DS32K118_FTM.h685 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
688 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
DS32K116_FTM.h685 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
688 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
DS32K146_FTM.h701 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
704 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
DS32K142W_FTM.h693 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
696 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
DS32K144W_FTM.h693 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
696 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
DS32K144_FTM.h689 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
692 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z4/
DMKE04Z4.h1629 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
1635 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE02Z4/
DMKE02Z4.h1617 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
1623 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z1284/
DMKE04Z1284.h1642 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
1648 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE06Z4/
DMKE06Z4.h1642 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
1648 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h4284 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
4290 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h2684 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
2690 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h2682 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
2688 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h4289 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
4295 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h3715 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
3721 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h4316 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
4322 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h4191 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
4197 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h5284 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
5290 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h5193 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
5199 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h5288 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
5294 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h5286 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
5292 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h4979 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
4985 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h5079 #define FTM_COMBINE_SYNCEN3_MASK (0x20000000U) macro
5085 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_SYNCEN3_SHIFT)) & FTM_COMBINE_SYNCEN3_MASK)

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