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Searched refs:FTM_COMBINE_FAULTEN1_MASK (Results 1 – 25 of 73) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K142_FTM.h618 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
621 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
DS32K148_FTM.h634 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
637 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
DS32K118_FTM.h610 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
613 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
DS32K116_FTM.h610 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
613 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
DS32K146_FTM.h626 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
629 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
DS32K142W_FTM.h618 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
621 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
DS32K144W_FTM.h618 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
621 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
DS32K144_FTM.h614 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
617 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z4/
DMKE04Z4.h1538 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
1544 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE02Z4/
DMKE02Z4.h1526 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
1532 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z1284/
DMKE04Z1284.h1551 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
1557 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE06Z4/
DMKE06Z4.h1551 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
1557 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h4193 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
4199 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h2588 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
2594 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h2586 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
2592 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h4198 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
4204 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h3624 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
3630 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h2552 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
2558 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h4225 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
4231 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h2553 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
2559 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h4100 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
4106 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h2551 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
2557 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h5172 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
5178 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h5087 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
5093 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h5176 #define FTM_COMBINE_FAULTEN1_MASK (0x4000U) macro
5182 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_FAULTEN1_SHIFT)) & FTM_COMBINE_FAULTEN1_MASK)

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