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Searched refs:FTM_COMBINE_DTEN2_MASK (Results 1 – 25 of 74) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K142_FTM.h648 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
651 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
DS32K148_FTM.h664 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
667 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
DS32K118_FTM.h640 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
643 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
DS32K116_FTM.h640 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
643 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
DS32K146_FTM.h656 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
659 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
DS32K142W_FTM.h648 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
651 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
DS32K144W_FTM.h648 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
651 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
DS32K144_FTM.h644 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
647 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z4/
DMKE04Z4.h1573 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
1579 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE02Z4/
DMKE02Z4.h1561 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
1567 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z1284/
DMKE04Z1284.h1586 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
1592 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE06Z4/
DMKE06Z4.h1586 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
1592 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h4228 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
4234 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h2624 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
2630 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h2622 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
2628 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h4233 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
4239 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h3659 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
3665 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h2583 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
2589 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h4260 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
4266 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h2584 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
2590 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h4135 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
4141 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h2582 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
2588 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h5216 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
5222 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h5128 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
5134 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h5220 #define FTM_COMBINE_DTEN2_MASK (0x100000U) macro
5226 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DTEN2_SHIFT)) & FTM_COMBINE_DTEN2_MASK)

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