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Searched refs:CRC_MODE_CMPL_WR_MASK (Results 1 – 25 of 63) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/lpc_crc/
Dfsl_crc.c132 config->complementIn = (bool)(mode & CRC_MODE_CMPL_WR_MASK); in CRC_GetConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC811/
DLPC811.h353 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
357 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC812/
DLPC812.h357 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
361 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC810/
DLPC810.h353 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
357 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC802/
DLPC802.h1089 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
1093 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC804/
DLPC804.h1471 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
1475 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC824/
DLPC824.h1206 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
1210 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC822/
DLPC822.h1206 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
1210 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC834/
DLPC834.h1062 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
1066 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC832/
DLPC832.h1062 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
1066 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC844/
DLPC844.h1169 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
1173 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC845/
DLPC845.h1575 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
1579 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h1156 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
1159 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h1154 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
1157 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC51U68/
DLPC51U68.h1202 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
1206 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54114/
DLPC54114_cm0plus.h1158 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
1162 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
DLPC54114_cm4.h1169 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
1173 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54113/
DLPC54113.h1170 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
1174 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54607/
DLPC54607.h1368 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
1372 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S005/
DLPC54S005.h1775 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
1779 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54005/
DLPC54005.h1367 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
1371 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54605/
DLPC54605.h1371 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
1375 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h2837 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
2841 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h2646 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
2649 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54616/
DLPC54616.h2912 #define CRC_MODE_CMPL_WR_MASK (0x8U) macro
2916 … (((uint32_t)(((uint32_t)(x)) << CRC_MODE_CMPL_WR_SHIFT)) & CRC_MODE_CMPL_WR_MASK)

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