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Searched refs:CACRR (Results 1 – 25 of 29) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
Dsystem_MIMXRT1021.c208 … freq = 500000000U / (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U); in SystemCoreClockUpdate()
DMIMXRT1021.h4788 __IO uint32_t CACRR; /**< CCM Arm Clock Root Register, offset: 0x10 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
Dsystem_MIMXRT1015.c206 … freq = 500000000U / (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U); in SystemCoreClockUpdate()
DMIMXRT1015.h3694 __IO uint32_t CACRR; /**< CCM Arm Clock Root Register, offset: 0x10 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
Dsystem_MIMXRT1052.c223 …freq = PLL1MainClock / (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U); in SystemCoreClockUpdate()
DMIMXRT1052.h5038 __IO uint32_t CACRR; /**< CCM Arm Clock Root Register, offset: 0x10 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
Dsystem_MIMXRT1051.c223 …freq = PLL1MainClock / (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U); in SystemCoreClockUpdate()
DMIMXRT1051.h5035 __IO uint32_t CACRR; /**< CCM Arm Clock Root Register, offset: 0x10 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
Dsystem_MIMXRT1064.c221 …freq = PLL1MainClock / (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
Dsystem_MIMXRT1041.c209 …freq = PLL1MainClock / (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U); in SystemCoreClockUpdate()
DMIMXRT1041.h6229 __IO uint32_t CACRR; /**< CCM Arm Clock Root Register, offset: 0x10 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
Dsystem_MIMXRT1042.c209 …freq = PLL1MainClock / (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
Dsystem_MIMXRT1062.c227 …freq = PLL1MainClock / (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
Dsystem_MIMXRT1061.c226 …freq = PLL1MainClock / (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
Dsystem_MIMXRT1024.c240 … freq = 500000000U / (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U); in SystemCoreClockUpdate()
DMIMXRT1024.h4768 __IO uint32_t CACRR; /**< CCM Arm Clock Root Register, offset: 0x10 */ member
/hal_nxp-latest/imx/drivers/
Dccm_imx6sx.h488 …ccmRootArmPodf = CCM_TUPLE(CACRR, CCM_CACRR_arm_podf_SHIFT, CCM_CACRR_arm_podf_MASK), …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/drivers/
Dfsl_clock.c140 (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U); in CLOCK_GetPeriphClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/drivers/
Dfsl_clock.c140 (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U); in CLOCK_GetPeriphClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/drivers/
Dfsl_clock.c140 (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U); in CLOCK_GetPeriphClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/drivers/
Dfsl_clock.c140 (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U); in CLOCK_GetPeriphClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/drivers/
Dfsl_clock.c139 (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U); in CLOCK_GetPeriphClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/drivers/
Dfsl_clock.c140 (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U); in CLOCK_GetPeriphClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/drivers/
Dfsl_clock.c140 (((CCM->CACRR & CCM_CACRR_ARM_PODF_MASK) >> CCM_CACRR_ARM_PODF_SHIFT) + 1U); in CLOCK_GetPeriphClkFreq()
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h4483 …__IO uint32_t CACRR; /**< CCM Arm Clock Root Register, offset: 0… member
4529 #define CCM_CACRR_REG(base) ((base)->CACRR)

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