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Searched refs:ADC_CLP0_CLP0_MASK (Results 1 – 25 of 79) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K144W_ADC.h384 #define ADC_CLP0_CLP0_MASK (0xFFU) macro
387 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
DS32K116_ADC.h380 #define ADC_CLP0_CLP0_MASK (0xFFU) macro
383 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
DS32K118_ADC.h380 #define ADC_CLP0_CLP0_MASK (0xFFU) macro
383 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
DS32K142W_ADC.h384 #define ADC_CLP0_CLP0_MASK (0xFFU) macro
387 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
DS32K142_ADC.h384 #define ADC_CLP0_CLP0_MASK (0xFFU) macro
387 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
DS32K144_ADC.h384 #define ADC_CLP0_CLP0_MASK (0xFFU) macro
387 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
DS32K146_ADC.h849 #define ADC_CLP0_CLP0_MASK (0xFFU) macro
852 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
DS32K148_ADC.h869 #define ADC_CLP0_CLP0_MASK (0xFFU) macro
872 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/drivers/adc12/
Dfsl_adc12.c104 uint32_t CLP0 = ((base->CLP0 & ADC_CLP0_CLP0_MASK) >> ADC_CLP0_CLP0_SHIFT); in ADC12_GetCalibrationStatus()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC041/
DMCXC041.h558 #define ADC_CLP0_CLP0_MASK (0x3FU) macro
560 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL17Z644/
DMKL17Z644.h674 #define ADC_CLP0_CLP0_MASK (0x3FU) macro
676 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC141/
DMCXC141.h730 #define ADC_CLP0_CLP0_MASK (0x3FU) macro
733 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC142/
DMCXC142.h728 #define ADC_CLP0_CLP0_MASK (0x3FU) macro
731 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/
DMKL25Z4.h530 #define ADC_CLP0_CLP0_MASK (0x3FU) macro
532 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC242/
DMCXC242.h730 #define ADC_CLP0_CLP0_MASK (0x3FU) macro
733 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL27Z644/
DMKL27Z644.h683 #define ADC_CLP0_CLP0_MASK (0x3FU) macro
685 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/
DMCXC144.h701 #define ADC_CLP0_CLP0_MASK (0x3FU) macro
704 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC143/
DMCXC143.h701 #define ADC_CLP0_CLP0_MASK (0x3FU) macro
704 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h742 #define ADC_CLP0_CLP0_MASK (0x3FU) macro
744 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC243/
DMCXC243.h699 #define ADC_CLP0_CLP0_MASK (0x3FU) macro
702 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/
DMCXC244.h701 #define ADC_CLP0_CLP0_MASK (0x3FU) macro
704 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h742 #define ADC_CLP0_CLP0_MASK (0x3FU) macro
744 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h656 #define ADC_CLP0_CLP0_MASK (0x3FU) macro
658 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h630 #define ADC_CLP0_CLP0_MASK (0xFFU) macro
634 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h755 #define ADC_CLP0_CLP0_MASK (0x3FU) macro
757 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP0_CLP0_MASK)

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