SYS_PLL1_GEN_CTRL_OFFSET (reference) in projects: hal_nxp-3.7.0

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Searched refs:SYS_PLL1_GEN_CTRL_OFFSET (Results 1 – 16 of 16) sorted by relevance

/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN5/drivers/
D	fsl_clock.h	190 #define SYS_PLL1_GEN_CTRL_OFFSET 0x94 macro 932 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_BYPASS_SHIFT), /!< CCM System PLL1 byp… 962 kCLOCK_SystemPll1Clke = CCM_ANALOG_TUPLE(SYS_PLL1_GEN_CTRL_OFFSET, 965 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV2_CLKE_SHIFT), /!< System pll1 Div2… 967 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV3_CLKE_SHIFT), /!< System pll1 Div3… 969 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV4_CLKE_SHIFT), /!< System pll1 Div4… 971 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV5_CLKE_SHIFT), /!< System pll1 Div5… 973 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV6_CLKE_SHIFT), /!< System pll1 Div6… 975 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV8_CLKE_SHIFT), /!< System pll1 Div8… 977 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV10_CLKE_SHIFT), /!< System pll1 Div… [all …]
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN1/drivers/
D	fsl_clock.h	190 #define SYS_PLL1_GEN_CTRL_OFFSET 0x94 macro 932 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_BYPASS_SHIFT), /!< CCM System PLL1 byp… 962 kCLOCK_SystemPll1Clke = CCM_ANALOG_TUPLE(SYS_PLL1_GEN_CTRL_OFFSET, 965 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV2_CLKE_SHIFT), /!< System pll1 Div2… 967 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV3_CLKE_SHIFT), /!< System pll1 Div3… 969 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV4_CLKE_SHIFT), /!< System pll1 Div4… 971 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV5_CLKE_SHIFT), /!< System pll1 Div5… 973 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV6_CLKE_SHIFT), /!< System pll1 Div6… 975 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV8_CLKE_SHIFT), /!< System pll1 Div8… 977 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV10_CLKE_SHIFT), /!< System pll1 Div… [all …]
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN3/drivers/
D	fsl_clock.h	190 #define SYS_PLL1_GEN_CTRL_OFFSET 0x94 macro 932 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_BYPASS_SHIFT), /!< CCM System PLL1 byp… 962 kCLOCK_SystemPll1Clke = CCM_ANALOG_TUPLE(SYS_PLL1_GEN_CTRL_OFFSET, 965 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV2_CLKE_SHIFT), /!< System pll1 Div2… 967 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV3_CLKE_SHIFT), /!< System pll1 Div3… 969 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV4_CLKE_SHIFT), /!< System pll1 Div4… 971 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV5_CLKE_SHIFT), /!< System pll1 Div5… 973 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV6_CLKE_SHIFT), /!< System pll1 Div6… 975 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV8_CLKE_SHIFT), /!< System pll1 Div8… 977 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV10_CLKE_SHIFT), /!< System pll1 Div… [all …]
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM3/drivers/
D	fsl_clock.h	183 #define SYS_PLL1_GEN_CTRL_OFFSET 0x94 macro 933 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_BYPASS_SHIFT), /!< CCM System PLL1 byp… 967 kCLOCK_SystemPll1Clke = CCM_ANALOG_TUPLE(SYS_PLL1_GEN_CTRL_OFFSET, 970 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV2_CLKE_SHIFT), /!< System pll1 Div2… 972 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV3_CLKE_SHIFT), /!< System pll1 Div3… 974 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV4_CLKE_SHIFT), /!< System pll1 Div4… 976 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV5_CLKE_SHIFT), /!< System pll1 Div5… 978 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV6_CLKE_SHIFT), /!< System pll1 Div6… 980 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV8_CLKE_SHIFT), /!< System pll1 Div8… 982 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV10_CLKE_SHIFT), /!< System pll1 Div… [all …]
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM4/drivers/
D	fsl_clock.h	183 #define SYS_PLL1_GEN_CTRL_OFFSET 0x94 macro 933 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_BYPASS_SHIFT), /!< CCM System PLL1 byp… 967 kCLOCK_SystemPll1Clke = CCM_ANALOG_TUPLE(SYS_PLL1_GEN_CTRL_OFFSET, 970 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV2_CLKE_SHIFT), /!< System pll1 Div2… 972 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV3_CLKE_SHIFT), /!< System pll1 Div3… 974 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV4_CLKE_SHIFT), /!< System pll1 Div4… 976 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV5_CLKE_SHIFT), /!< System pll1 Div5… 978 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV6_CLKE_SHIFT), /!< System pll1 Div6… 980 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV8_CLKE_SHIFT), /!< System pll1 Div8… 982 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV10_CLKE_SHIFT), /!< System pll1 Div… [all …]
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM6/drivers/
D	fsl_clock.h	183 #define SYS_PLL1_GEN_CTRL_OFFSET 0x94 macro 933 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_BYPASS_SHIFT), /!< CCM System PLL1 byp… 967 kCLOCK_SystemPll1Clke = CCM_ANALOG_TUPLE(SYS_PLL1_GEN_CTRL_OFFSET, 970 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV2_CLKE_SHIFT), /!< System pll1 Div2… 972 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV3_CLKE_SHIFT), /!< System pll1 Div3… 974 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV4_CLKE_SHIFT), /!< System pll1 Div4… 976 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV5_CLKE_SHIFT), /!< System pll1 Div5… 978 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV6_CLKE_SHIFT), /!< System pll1 Div6… 980 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV8_CLKE_SHIFT), /!< System pll1 Div8… 982 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV10_CLKE_SHIFT), /!< System pll1 Div… [all …]
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN6/drivers/
D	fsl_clock.h	190 #define SYS_PLL1_GEN_CTRL_OFFSET 0x94 macro 932 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_BYPASS_SHIFT), /!< CCM System PLL1 byp… 962 kCLOCK_SystemPll1Clke = CCM_ANALOG_TUPLE(SYS_PLL1_GEN_CTRL_OFFSET, 965 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV2_CLKE_SHIFT), /!< System pll1 Div2… 967 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV3_CLKE_SHIFT), /!< System pll1 Div3… 969 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV4_CLKE_SHIFT), /!< System pll1 Div4… 971 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV5_CLKE_SHIFT), /!< System pll1 Div5… 973 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV6_CLKE_SHIFT), /!< System pll1 Div6… 975 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV8_CLKE_SHIFT), /!< System pll1 Div8… 977 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV10_CLKE_SHIFT), /!< System pll1 Div… [all …]
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN4/drivers/
D	fsl_clock.h	190 #define SYS_PLL1_GEN_CTRL_OFFSET 0x94 macro 932 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_BYPASS_SHIFT), /!< CCM System PLL1 byp… 962 kCLOCK_SystemPll1Clke = CCM_ANALOG_TUPLE(SYS_PLL1_GEN_CTRL_OFFSET, 965 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV2_CLKE_SHIFT), /!< System pll1 Div2… 967 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV3_CLKE_SHIFT), /!< System pll1 Div3… 969 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV4_CLKE_SHIFT), /!< System pll1 Div4… 971 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV5_CLKE_SHIFT), /!< System pll1 Div5… 973 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV6_CLKE_SHIFT), /!< System pll1 Div6… 975 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV8_CLKE_SHIFT), /!< System pll1 Div8… 977 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV10_CLKE_SHIFT), /!< System pll1 Div… [all …]
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM5/drivers/
D	fsl_clock.h	183 #define SYS_PLL1_GEN_CTRL_OFFSET 0x94 macro 933 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_BYPASS_SHIFT), /!< CCM System PLL1 byp… 967 kCLOCK_SystemPll1Clke = CCM_ANALOG_TUPLE(SYS_PLL1_GEN_CTRL_OFFSET, 970 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV2_CLKE_SHIFT), /!< System pll1 Div2… 972 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV3_CLKE_SHIFT), /!< System pll1 Div3… 974 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV4_CLKE_SHIFT), /!< System pll1 Div4… 976 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV5_CLKE_SHIFT), /!< System pll1 Div5… 978 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV6_CLKE_SHIFT), /!< System pll1 Div6… 980 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV8_CLKE_SHIFT), /!< System pll1 Div8… 982 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV10_CLKE_SHIFT), /!< System pll1 Div… [all …]
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM2/drivers/
D	fsl_clock.h	183 #define SYS_PLL1_GEN_CTRL_OFFSET 0x94 macro 933 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_BYPASS_SHIFT), /!< CCM System PLL1 byp… 967 kCLOCK_SystemPll1Clke = CCM_ANALOG_TUPLE(SYS_PLL1_GEN_CTRL_OFFSET, 970 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV2_CLKE_SHIFT), /!< System pll1 Div2… 972 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV3_CLKE_SHIFT), /!< System pll1 Div3… 974 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV4_CLKE_SHIFT), /!< System pll1 Div4… 976 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV5_CLKE_SHIFT), /!< System pll1 Div5… 978 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV6_CLKE_SHIFT), /!< System pll1 Div6… 980 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV8_CLKE_SHIFT), /!< System pll1 Div8… 982 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV10_CLKE_SHIFT), /!< System pll1 Div… [all …]
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN2/drivers/
D	fsl_clock.h	190 #define SYS_PLL1_GEN_CTRL_OFFSET 0x94 macro 932 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_BYPASS_SHIFT), /!< CCM System PLL1 byp… 962 kCLOCK_SystemPll1Clke = CCM_ANALOG_TUPLE(SYS_PLL1_GEN_CTRL_OFFSET, 965 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV2_CLKE_SHIFT), /!< System pll1 Div2… 967 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV3_CLKE_SHIFT), /!< System pll1 Div3… 969 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV4_CLKE_SHIFT), /!< System pll1 Div4… 971 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV5_CLKE_SHIFT), /!< System pll1 Div5… 973 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV6_CLKE_SHIFT), /!< System pll1 Div6… 975 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV8_CLKE_SHIFT), /!< System pll1 Div8… 977 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV10_CLKE_SHIFT), /!< System pll1 Div… [all …]
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM1/drivers/
D	fsl_clock.h	183 #define SYS_PLL1_GEN_CTRL_OFFSET 0x94 macro 933 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_BYPASS_SHIFT), /!< CCM System PLL1 byp… 967 kCLOCK_SystemPll1Clke = CCM_ANALOG_TUPLE(SYS_PLL1_GEN_CTRL_OFFSET, 970 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV2_CLKE_SHIFT), /!< System pll1 Div2… 972 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV3_CLKE_SHIFT), /!< System pll1 Div3… 974 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV4_CLKE_SHIFT), /!< System pll1 Div4… 976 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV5_CLKE_SHIFT), /!< System pll1 Div5… 978 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV6_CLKE_SHIFT), /!< System pll1 Div6… 980 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV8_CLKE_SHIFT), /!< System pll1 Div8… 982 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV10_CLKE_SHIFT), /!< System pll1 Div… [all …]
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML6/drivers/
D	fsl_clock.h	208 #define SYS_PLL1_GEN_CTRL_OFFSET 0x94 macro 1188 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_BYPASS_SHIFT), /!< CCM System PLL1 byp… 1218 kCLOCK_SystemPll1Clke = CCM_ANALOG_TUPLE(SYS_PLL1_GEN_CTRL_OFFSET, 1221 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV2_CLKE_SHIFT), /!< System pll1 Div2… 1223 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV3_CLKE_SHIFT), /!< System pll1 Div3… 1225 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV4_CLKE_SHIFT), /!< System pll1 Div4… 1227 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV5_CLKE_SHIFT), /!< System pll1 Div5… 1229 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV6_CLKE_SHIFT), /!< System pll1 Div6… 1231 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV8_CLKE_SHIFT), /!< System pll1 Div8… 1233 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV10_CLKE_SHIFT), /!< System pll1 Div… [all …]
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML4/drivers/
D	fsl_clock.h	208 #define SYS_PLL1_GEN_CTRL_OFFSET 0x94 macro 1188 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_BYPASS_SHIFT), /!< CCM System PLL1 byp… 1218 kCLOCK_SystemPll1Clke = CCM_ANALOG_TUPLE(SYS_PLL1_GEN_CTRL_OFFSET, 1221 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV2_CLKE_SHIFT), /!< System pll1 Div2… 1223 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV3_CLKE_SHIFT), /!< System pll1 Div3… 1225 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV4_CLKE_SHIFT), /!< System pll1 Div4… 1227 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV5_CLKE_SHIFT), /!< System pll1 Div5… 1229 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV6_CLKE_SHIFT), /!< System pll1 Div6… 1231 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV8_CLKE_SHIFT), /!< System pll1 Div8… 1233 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV10_CLKE_SHIFT), /!< System pll1 Div… [all …]
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML3/drivers/
D	fsl_clock.h	208 #define SYS_PLL1_GEN_CTRL_OFFSET 0x94 macro 1188 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_BYPASS_SHIFT), /!< CCM System PLL1 byp… 1218 kCLOCK_SystemPll1Clke = CCM_ANALOG_TUPLE(SYS_PLL1_GEN_CTRL_OFFSET, 1221 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV2_CLKE_SHIFT), /!< System pll1 Div2… 1223 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV3_CLKE_SHIFT), /!< System pll1 Div3… 1225 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV4_CLKE_SHIFT), /!< System pll1 Div4… 1227 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV5_CLKE_SHIFT), /!< System pll1 Div5… 1229 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV6_CLKE_SHIFT), /!< System pll1 Div6… 1231 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV8_CLKE_SHIFT), /!< System pll1 Div8… 1233 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV10_CLKE_SHIFT), /!< System pll1 Div… [all …]
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML8/drivers/
D	fsl_clock.h	214 #define SYS_PLL1_GEN_CTRL_OFFSET 0x94 macro 1196 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_BYPASS_SHIFT), /!< CCM System PLL1 byp… 1226 kCLOCK_SystemPll1Clke = CCM_ANALOG_TUPLE(SYS_PLL1_GEN_CTRL_OFFSET, 1229 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV2_CLKE_SHIFT), /!< System pll1 Div2… 1231 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV3_CLKE_SHIFT), /!< System pll1 Div3… 1233 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV4_CLKE_SHIFT), /!< System pll1 Div4… 1235 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV5_CLKE_SHIFT), /!< System pll1 Div5… 1237 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV6_CLKE_SHIFT), /!< System pll1 Div6… 1239 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV8_CLKE_SHIFT), /!< System pll1 Div8… 1241 …SYS_PLL1_GEN_CTRL_OFFSET, CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_DIV10_CLKE_SHIFT), /!< System pll1 Div… [all …]

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
acpica-3.6.0
acpica-3.7.0
babblesim_base-3.4.0
babblesim_base-3.6.0-3.5.0
babblesim_base-3.7.0
babblesim_ext_2G4_channel_NtNcable-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
babblesim_ext_2G4_phy_v1-3.7.0
babblesim_ext_libCryptov1-3.7.0-3.6.0-3.5.0-3.4.0
bsim-3.4.0
bsim-3.6.0-3.5.0
bsim-3.7.0
canopennode-2.7.6
canopennode-3.5.0-3.4.0
chre-3.4.0
civetweb-2.7.6
cmsis-2.7.6
cmsis-3.4.0
cmsis-3.5.0
cmsis-3.7.0-3.6.0
cmsis-dsp-3.5.0
cmsis-dsp-3.7.0-3.6.0
cmsis-nn-3.6.0-3.5.0
cmsis-nn-3.7.0
edtt-2.7.6
edtt-3.6.0-3.5.0-3.4.0
edtt-3.7.0
fatfs-2.7.6
fatfs-3.7.0-3.6.0-3.5.0-3.4.0
hal_adi-3.7.0
hal_altera-2.7.6
hal_altera-3.6.0-3.5.0-3.4.0
hal_altera-3.7.0
hal_ambiq-3.5.0
hal_ambiq-3.6.0
hal_ambiq-3.7.0
hal_atmel-2.7.6
hal_atmel-3.5.0-3.4.0
hal_atmel-3.6.0
hal_atmel-3.7.0
hal_cypress-2.7.6
hal_espressif-2.7.6
hal_espressif-3.4.0
hal_espressif-3.5.0
hal_espressif-3.6.0
hal_espressif-3.7.0
hal_ethos_u-3.6.0-3.5.0-3.4.0
hal_ethos_u-3.7.0
hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0
hal_infineon-2.7.6
hal_infineon-3.4.0
hal_infineon-3.5.0
hal_infineon-3.6.0
hal_infineon-3.7.0
hal_intel-3.5.0
hal_intel-3.6.0
hal_intel-3.7.0
hal_microchip-2.7.6
hal_microchip-3.6.0-3.5.0-3.4.0
hal_microchip-3.7.0
hal_nordic-2.7.6
hal_nordic-3.4.0
hal_nordic-3.5.0
hal_nordic-3.6.0
hal_nordic-3.7.0
hal_nuvoton-2.7.6
hal_nuvoton-3.4.0
hal_nuvoton-3.5.0
hal_nuvoton-3.6.0
hal_nuvoton-3.7.0
hal_nxp-2.7.6
hal_nxp-3.4.0
hal_nxp-3.5.0
hal_nxp-3.6.0
hal_nxp-3.7.0
hal_openisa-2.7.6
hal_openisa-3.5.0-3.4.0
hal_openisa-3.7.0-3.6.0
hal_quicklogic-3.6.0-3.5.0-3.4.0-2.7.6
hal_quicklogic-3.7.0
hal_renesas-3.4.0
hal_renesas-3.5.0
hal_renesas-3.6.0
hal_renesas-3.7.0
hal_rpi_pico-3.4.0
hal_rpi_pico-3.7.0-3.6.0-3.5.0
hal_silabs-2.7.6
hal_silabs-3.4.0
hal_silabs-3.5.0
hal_silabs-3.6.0
hal_silabs-3.7.0
hal_st-2.7.6
hal_st-3.4.0
hal_st-3.5.0
hal_st-3.6.0
hal_st-3.7.0
hal_stm32-2.7.6
hal_stm32-3.4.0
hal_stm32-3.5.0
hal_stm32-3.6.0
hal_stm32-3.7.0
hal_telink-2.7.6
hal_telink-3.6.0-3.5.0-3.4.0
hal_telink-3.7.0
hal_ti-2.7.6
hal_ti-3.4.0
hal_ti-3.7.0-3.6.0-3.5.0
hal_wurthelektronik-3.5.0-3.4.0
hal_wurthelektronik-3.7.0-3.6.0
hal_xtensa-2.7.6
hal_xtensa-3.4.0
hal_xtensa-3.5.0
hal_xtensa-3.6.0
hal_xtensa-3.7.0
hostap-3.6.0
hostap-3.7.0
liblc3-3.5.0-3.4.0
liblc3-3.7.0-3.6.0
libmetal-2.7.6
libmetal-3.5.0-3.4.0
libmetal-3.6.0
libmetal-3.7.0
littlefs-2.7.6
littlefs-3.5.0-3.4.0
littlefs-3.7.0-3.6.0
loramac-node-2.7.6
loramac-node-3.4.0
loramac-node-3.6.0-3.5.0
loramac-node-3.7.0
lvgl-2.7.6
lvgl-3.4.0
lvgl-3.5.0
lvgl-3.6.0
lvgl-3.7.0
lz4-3.4.0-2.7.6
mbedtls-2.7.6
mbedtls-3.4.0
mbedtls-3.5.0
mbedtls-3.6.0
mbedtls-3.7.0
mcuboot-2.7.6
mcuboot-3.4.0
mcuboot-3.5.0
mcuboot-3.6.0
mcuboot-3.7.0
mcumgr-2.7.6
mipi-sys-t-2.7.6
mipi-sys-t-3.4.0
mipi-sys-t-3.6.0-3.5.0
mipi-sys-t-3.7.0
nanopb-2.7.6
nanopb-3.4.0
net-tools-2.7.6
net-tools-3.4.0
net-tools-3.5.0
net-tools-3.6.0
net-tools-3.7.0
nrf_hw_models-2.7.6
nrf_hw_models-3.4.0
nrf_hw_models-3.5.0
nrf_hw_models-3.6.0
nrf_hw_models-3.7.0
open-amp-2.7.6
open-amp-3.4.0
open-amp-3.5.0
open-amp-3.6.0
open-amp-3.7.0
openthread-2.7.6
openthread-3.4.0
openthread-3.5.0
openthread-3.6.0
openthread-3.7.0
percepio-3.5.0
percepio-3.6.0
percepio-3.7.0
picolibc-3.5.0-3.4.0
picolibc-3.7.0-3.6.0
psa-arch-tests-3.4.0
segger-2.7.6
segger-3.4.0
segger-3.6.0-3.5.0
segger-3.7.0
sof-2.7.6
sof-3.4.0
tf-m-tests-3.4.0
tflite-micro-3.4.0-2.7.6
thrift-3.4.0
tinycbor-2.7.6
tinycrypt-3.6.0-3.5.0-3.4.0-2.7.6
tinycrypt-3.7.0
trusted-firmware-a-3.4.0
trusted-firmware-a-3.6.0-3.5.0
trusted-firmware-a-3.7.0
trusted-firmware-m-3.4.0
trusted-firmware-m-3.5.0
trusted-firmware-m-3.6.0
trusted-firmware-m-3.7.0
uoscore-uedhoc-3.4.0
uoscore-uedhoc-3.5.0
uoscore-uedhoc-3.6.0
uoscore-uedhoc-3.7.0
zcbor-3.5.0-3.4.0
zcbor-3.6.0
zcbor-3.7.0
zscilib-3.4.0