| /hal_nxp-3.6.0/mcux/mcux-sdk/CMSIS/DSP/Source/TransformFunctions/ |
| D | arm_bitreversal2.S | 95 ADDS r1,r2,#0
98 LDRH r2,[r1,#2]
100 ADD r2,r0,r2
102 LDR r5,[r2,#0]
105 STR r4,[r2,#0]
106 LDR r5,[r2,#4]
109 STR r4,[r2,#4]
120 ADDS r1,r2,#0
123 LDRH r2,[r1,#2]
125 LSRS r2,r2,#1
[all …]
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| D | arm_cfft_radix8_f16.c | 58 float16_t r1, r2, r3, r4, r5, r6, r7, r8; in arm_radix8_butterfly_f16() local
85 r2 = pSrc[2 * i2] + pSrc[2 * i6]; in arm_radix8_butterfly_f16()
93 r3 = r2 - r4; in arm_radix8_butterfly_f16()
94 r2 = r2 + r4; in arm_radix8_butterfly_f16()
95 pSrc[2 * i1] = r1 + r2; in arm_radix8_butterfly_f16()
96 pSrc[2 * i5] = r1 - r2; in arm_radix8_butterfly_f16()
99 r2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1]; in arm_radix8_butterfly_f16()
107 s3 = r2 - r4; in arm_radix8_butterfly_f16()
108 r2 = r2 + r4; in arm_radix8_butterfly_f16()
109 pSrc[2 * i1 + 1] = r1 + r2; in arm_radix8_butterfly_f16()
[all …]
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| D | arm_cfft_radix8_f32.c | 56 float32_t r1, r2, r3, r4, r5, r6, r7, r8; in arm_radix8_butterfly_f32() local
83 r2 = pSrc[2 * i2] + pSrc[2 * i6]; in arm_radix8_butterfly_f32()
91 r3 = r2 - r4; in arm_radix8_butterfly_f32()
92 r2 = r2 + r4; in arm_radix8_butterfly_f32()
93 pSrc[2 * i1] = r1 + r2; in arm_radix8_butterfly_f32()
94 pSrc[2 * i5] = r1 - r2; in arm_radix8_butterfly_f32()
97 r2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1]; in arm_radix8_butterfly_f32()
105 s3 = r2 - r4; in arm_radix8_butterfly_f32()
106 r2 = r2 + r4; in arm_radix8_butterfly_f32()
107 pSrc[2 * i1 + 1] = r1 + r2; in arm_radix8_butterfly_f32()
[all …]
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| D | arm_cfft_radix4_q31.c | 152 q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3; in arm_radix4_butterfly_q31() local
193 r2 = (pSrc[(2U * i0)] >> 4U) - (pSrc[(2U * i2)] >> 4U); in arm_radix4_butterfly_q31()
235 r1 = r2 + t1; in arm_radix4_butterfly_q31()
237 r2 = r2 - t1; in arm_radix4_butterfly_q31()
261 pSrc[2U * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) + in arm_radix4_butterfly_q31()
266 ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; in arm_radix4_butterfly_q31()
323 r2 = pSrc[2U * i0] - pSrc[2U * i2]; in arm_radix4_butterfly_q31()
360 r1 = r2 + t1; in arm_radix4_butterfly_q31()
362 r2 = r2 - t1; in arm_radix4_butterfly_q31()
378 pSrc[2U * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) + in arm_radix4_butterfly_q31()
[all …]
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| /hal_nxp-3.6.0/mcux/mcux-sdk/middleware/mmcau/asm-cm0p/src/ |
| D | mmcau_md5_functions.s | 64 ldmia r1!, {r2-r4} @ load md5_initial_h[1-3] and move r4 by 12 byte
69 str r2, [r0, #1<<2]
99 # r2 | *md5_state (arg2)
101 # > r2 | irrelevant
115 push {r1-r2, r4-r7} @ store num_blks, *md5_state, regs
118 ldmia r2, {r1-r4} @ load md5_state[0-3]
119 # ldr r1,[r2, #0<<2] @ expand ldmia to ldr to be interruptible
120 # ldr r3,[r2, #2<<2]
121 # ldr r4,[r2, #3<<2]
122 # ldr r2,[r2, #1<<2]
[all …]
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| D | mmcau_sha1_functions.s | 67 ldmia r1!, {r2-r5} @ load sha1_initial_h[1-4] + move by 12 byte
102 # r2 | *sha1_state (arg2)
104 # > r2 | irrelevant
128 push {r0-r2, r4-r7} @ store *msg_data, num_blks, *sha1_state, regs
132 ldmia r2!, {r3-r7} @ load sha1_state[0-4]
147 add r2, sp, #0 @ set *sha1_state (on stack)
148 # stmia r2!, {r3-r7} @ store sha1_state[0-4]
149 str r3, [r2, #0<<2] @ expand stmia into str to be interruptible
150 str r4, [r2, #1<<2]
151 str r5, [r2, #2<<2]
[all …]
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| D | mmcau_aes_functions.s | 53 # r2 | *key_sch (arg2)
55 # > r2 | irrelevant
98 # r2 | *key_sch
131 stmia r2!, {r3-r7} @ store key_sch[0-4], key_sch++
142 stmia r2!, {r0-r1, r7} @ store key_sch[5-7], key_sch++
161 stmia r2!, {r3-r6} @ store key_sch[8-11], *key_sch++
171 subs r2, #8<<2 @ set *key_sch[4]
172 ldmia r2!, {r3-r6} @ load key_sch[4-7], *key_sch++
177 adds r2, #4<<2 @ set *key_sch[12]
178 stmia r2!, {r3-r6} @ store key_sch[12-15], *key_sch++
[all …]
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| D | mmcau_sha256_functions.s | 110 # r2 | *output (arg2)
112 # > r2 | irrelevant
142 push {r0-r2, r3-r7} @ store *input, num_blks, *output, high regs
148 ldmia r2!, {r4-r7} @ load output[0-3]
156 ldmia r2!, {r4-r7} @ load output[4-7]
168 ldmia r1!, {r2-r7} @ load sha256_reg_data[4-9] and move r1 by 24 bytes
201 # r2 | mmcau_3_cmds(MVAR+CA8,HASH+HF2S,HASH+HF2M)
224 str r2, [r5] @ t1, +SIGMA0(e), +Maj(a,b,c)
236 str r2, [r5] @ t1, +SIGMA0(e), +Maj(a,b,c)
248 str r2, [r5] @ t1, +SIGMA0(e), +Maj(a,b,c)
[all …]
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| /hal_nxp-3.6.0/mcux/mcux-sdk/utilities/misc_utilities/ |
| D | fsl_memcpy.S | 199 cmp r2, #0
206 subs r2, r2, #1 /* n-- */
216 cmp r2, #16
219 subs r2, r2, #16 /* n -= 16 */
221 cmp r2, #16
225 lsls r3, r2, #28
230 lsls r3, r2, #29
235 lsls r3, r2, #30
240 lsls r3, r2, #31
250 cmp r2, #4
[all …]
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX9352/gcc/ |
| D | startup_MIMX9352_cm33.S | 331 ldr r2, [r1]
332 msr msp, r2
345 ldr r2, =__data_start__
352 subs r3, r2
357 str r0, [r2, r3]
362 cmp r2, r3
365 strlt r0, [r2], #4
379 ldr r2, =__bss_end__
383 cmp r1, r2
392 ldr r2, =__HeapLimit
[all …]
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| /hal_nxp-3.6.0/mcux/mcux-sdk/CMSIS/RTOS2/RTX/Source/ |
| D | rtx_core_ca.h | 431 mov r2,r0 in atomic_wr8()
433 ldrexb r0,[r2] in atomic_wr8()
434 strexb r3,r1,[r2] in atomic_wr8()
476 mov r2,r0 in atomic_set32()
478 ldrex r0,[r2] in atomic_set32()
480 strex r3,r0,[r2] in atomic_set32()
525 mov r2,r0 in atomic_clr32()
527 ldrex r0,[r2] in atomic_clr32()
529 strex r3,r4,[r2] in atomic_clr32()
574 mov r2,r0 in atomic_chk32_all()
[all …]
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| D | rtx_core_cm.h | 466 mov r2,r0 in atomic_wr8()
468 ldrexb r0,[r2] in atomic_wr8()
469 strexb r3,r1,[r2] in atomic_wr8()
513 mov r2,r0 in atomic_set32()
515 ldrex r0,[r2] in atomic_set32()
517 strex r3,r0,[r2] in atomic_set32()
573 mov r2,r0 in atomic_clr32()
575 ldrex r0,[r2] in atomic_clr32()
577 strex r3,r4,[r2] in atomic_clr32()
633 mov r2,r0 in atomic_chk32_all()
[all …]
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1011/gcc/ |
| D | startup_MIMXRT1011.S | 302 ldr r2, [r1]
303 msr msp, r2
318 ldr r2, =__data_start__
325 subs r3, r2
330 str r0, [r2, r3]
335 cmp r2, r3
338 strlt r0, [r2], #4
342 ldr r2, =__ram_function_start__
348 subs r3, r2
353 str r0, [r2, r3]
[all …]
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1015/gcc/ |
| D | startup_MIMXRT1015.S | 302 ldr r2, [r1]
303 msr msp, r2
318 ldr r2, =__data_start__
325 subs r3, r2
330 str r0, [r2, r3]
335 cmp r2, r3
338 strlt r0, [r2], #4
342 ldr r2, =__ram_function_start__
348 subs r3, r2
353 str r0, [r2, r3]
[all …]
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE04Z4/gcc/ |
| D | startup_MKE04Z4.S | 101 ldr r2, [r1]
102 msr msp, r2
115 ldr r2, =__data_start__
118 subs r3, r2
124 str r0, [r2,r3]
138 ldr r2, =__bss_end__
140 subs r2, r1
145 subs r2, 4
146 str r0, [r1, r2]
|
| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC54114/gcc/ |
| D | startup_LPC54114_cm0plus.S | 117 ldrh r2, [r6, #16] /* Mask for CPU ID bits */
118 ands r2, r1, r2 /* r2 = ARM COrtex CPU ID */
120 cmp r3, r2 /* Core ID matches M4 identifier */
143 ldr r2, [r0] /* r1 = SYSCON co-processor boot address */
145 cmp r2, #0 /* Slave boot address = 0 (not set up)? */
155 bx r2 /* Jump to slave boot address */
183 ldr r2, =__data_start__
186 subs r3, r2
192 str r0, [r2,r3]
206 ldr r2, =__bss_end__
[all …]
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MD7/gcc/ |
| D | startup_MIMX8MD7_cm4.S | 190 ldr r2, [r1]
191 msr msp, r2
205 ldr r2, =__data_start__
212 subs r3, r2
217 str r0, [r2, r3]
222 cmp r2, r3
225 strlt r0, [r2], #4
229 ldr r2, =__noncachedata_start__
235 subs r3, r2
240 str r0, [r2, r3]
[all …]
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MD6/gcc/ |
| D | startup_MIMX8MD6_cm4.S | 190 ldr r2, [r1]
191 msr msp, r2
205 ldr r2, =__data_start__
212 subs r3, r2
217 str r0, [r2, r3]
222 cmp r2, r3
225 strlt r0, [r2], #4
229 ldr r2, =__noncachedata_start__
235 subs r3, r2
240 str r0, [r2, r3]
[all …]
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MQ5/gcc/ |
| D | startup_MIMX8MQ5_cm4.S | 190 ldr r2, [r1]
191 msr msp, r2
205 ldr r2, =__data_start__
212 subs r3, r2
217 str r0, [r2, r3]
222 cmp r2, r3
225 strlt r0, [r2], #4
229 ldr r2, =__noncachedata_start__
235 subs r3, r2
240 str r0, [r2, r3]
[all …]
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MQ6/gcc/ |
| D | startup_MIMX8MQ6_cm4.S | 190 ldr r2, [r1]
191 msr msp, r2
205 ldr r2, =__data_start__
212 subs r3, r2
217 str r0, [r2, r3]
222 cmp r2, r3
225 strlt r0, [r2], #4
229 ldr r2, =__noncachedata_start__
235 subs r3, r2
240 str r0, [r2, r3]
[all …]
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MQ7/gcc/ |
| D | startup_MIMX8MQ7_cm4.S | 190 ldr r2, [r1]
191 msr msp, r2
205 ldr r2, =__data_start__
212 subs r3, r2
217 str r0, [r2, r3]
222 cmp r2, r3
225 strlt r0, [r2], #4
229 ldr r2, =__noncachedata_start__
235 subs r3, r2
240 str r0, [r2, r3]
[all …]
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| /hal_nxp-3.6.0/mcux/mcux-sdk/middleware/mmcau/asm-cm4-cm7/src/ |
| D | mmcau_aes_functions.s | 55 # r2 = scratch / output *key_sch (arg2)
88 stmia r2!, {r4-r7} @ to key_sch[0-3]
104 stmia r2!, {r1,r3,r8-r9} @ to key_sch[4-7]
119 stmia r2!, {r4-r7} @ store key_sch[8-11]
130 stmia r2!, {r1,r3,r8-r9} @ store key_sch[12-15]
144 stmia r2!, {r4-r7} @ store key_sch[16-19]
155 stmia r2!, {r1,r3,r8-r9} @ store key_sch[20-23]
169 stmia r2!, {r4-r7} @ store key_sch[24-27]
180 stmia r2!, {r1,r3,r8-r9} @ store key_sch[28-31]
194 stmia r2!, {r4-r7} @ store key_sch[32-35]
[all …]
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE14Z4/gcc/ |
| D | startup_MKE14Z4.S | 99 ldr r2, [r1]
100 msr msp, r2
113 ldr r2, =__data_start__
116 subs r3, r2
122 str r0, [r2,r3]
136 ldr r2, =__bss_end__
138 subs r2, r1
143 subs r2, 4
144 str r0, [r1, r2]
|
| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE15Z4/gcc/ |
| D | startup_MKE15Z4.S | 99 ldr r2, [r1]
100 msr msp, r2
113 ldr r2, =__data_start__
116 subs r3, r2
122 str r0, [r2,r3]
136 ldr r2, =__bss_end__
138 subs r2, r1
143 subs r2, 4
144 str r0, [r1, r2]
|
| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1051/gcc/ |
| D | startup_MIMXRT1051.S | 302 ldr r2, [r1]
303 msr msp, r2
318 ldr r2, =__data_start__
325 subs r3, r2
330 str r0, [r2, r3]
335 cmp r2, r3
338 strlt r0, [r2], #4
342 ldr r2, =__ram_function_start__
348 subs r3, r2
353 str r0, [r2, r3]
[all …]
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