| /hal_nxp-3.6.0/mcux/mcux-sdk/CMSIS/Include/ |
| D | mpu_armv8.h | 134 SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Enable()
146 SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Disable()
159 SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Enable_NS()
171 SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Disable_NS()
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| D | mpu_armv7.h | 195 SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Enable()
207 SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Disable()
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| D | core_cm0.h | 351 …__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State … member
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| D | core_cm1.h | 351 …__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State … member
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| D | core_sc000.h | 357 …__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State … member
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| D | core_cm0plus.h | 369 …__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State … member
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| D | core_armv8mbl.h | 395 …__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State … member
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| D | core_cm3.h | 383 …__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State … member
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| D | core_sc300.h | 383 …__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State … member
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| D | core_cm4.h | 449 …__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State … member
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| D | core_cm23.h | 395 …__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State … member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/CMSIS/Core/Include/ |
| D | mpu_armv8.h | 135 SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Enable()
147 SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Disable()
163 SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Enable_NS()
175 SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Disable_NS()
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| D | mpu_armv7.h | 196 SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Enable()
208 SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Disable()
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| D | core_cm0plus.h | 369 …__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State … member
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| D | core_cm4.h | 454 …__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State … member
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| /hal_nxp-3.6.0/s32/drivers/s32k1/BaseNXP/header/ |
| D | S32K116_SCB.h | 88 …__IO uint32_t SHCSR; /**< System Handler Control and State Register, o… member
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| D | S32K118_SCB.h | 88 …__IO uint32_t SHCSR; /**< System Handler Control and State Register, o… member
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| D | S32K142W_SCB.h | 88 …__IO uint32_t SHCSR; /**< System Handler Control and State Register, o… member
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| D | S32K144_SCB.h | 88 …__IO uint32_t SHCSR; /**< System Handler Control and State Register, o… member
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| D | S32K144W_SCB.h | 88 …__IO uint32_t SHCSR; /**< System Handler Control and State Register, o… member
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| D | S32K142_SCB.h | 88 …__IO uint32_t SHCSR; /**< System Handler Control and State Register, o… member
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| D | S32K148_SCB.h | 88 …__IO uint32_t SHCSR; /**< System Handler Control and State Register, o… member
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| D | S32K146_SCB.h | 88 …__IO uint32_t SHCSR; /**< System Handler Control and State Register, o… member
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| /hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/ |
| D | S32Z2_SCB.h | 92 …__IO uint32_t SHCSR; /**< System Handler Control and State Register, o… member
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| /hal_nxp-3.6.0/s32/drivers/s32k3/BaseNXP/header/ |
| D | S32K344_SCB.h | 91 …__IO uint32_t SHCSR; /**< System Handler Control and State Register, o… member
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