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Searched refs:ERM_CR0_ENCIE5_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_ERM.h191 #define ERM_CR0_ENCIE5_MASK (0x400U) macro
194 … (((uint32_t)(((uint32_t)(x)) << ERM_CR0_ENCIE5_SHIFT)) & ERM_CR0_ENCIE5_MASK)
/hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_ERM.h259 #define ERM_CR0_ENCIE5_MASK (0x400U) macro
262 … (((uint32_t)(((uint32_t)(x)) << ERM_CR0_ENCIE5_SHIFT)) & ERM_CR0_ENCIE5_MASK)