Searched refs:DVPORT (Results 1 – 4 of 4) sorted by relevance
282 IP_CORE_DFS->DVPORT[0U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()283 IP_CORE_DFS->DVPORT[1U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()284 IP_CORE_DFS->DVPORT[2U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()285 IP_CORE_DFS->DVPORT[3U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()286 IP_CORE_DFS->DVPORT[4U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()287 IP_CORE_DFS->DVPORT[5U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()292 IP_PERIPH_DFS->DVPORT[0U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()293 IP_PERIPH_DFS->DVPORT[1U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()294 IP_PERIPH_DFS->DVPORT[2U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()295 IP_PERIPH_DFS->DVPORT[3U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()[all …]
1423 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[0U])) in Clock_Ip_Get_COREPLL_DFS0_Frequency()1425 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[0U]); in Clock_Ip_Get_COREPLL_DFS0_Frequency()1433 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[1U])) in Clock_Ip_Get_COREPLL_DFS1_Frequency()1435 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[1U]); in Clock_Ip_Get_COREPLL_DFS1_Frequency()1443 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[2U])) in Clock_Ip_Get_COREPLL_DFS2_Frequency()1445 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[2U]); in Clock_Ip_Get_COREPLL_DFS2_Frequency()1453 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[3U])) in Clock_Ip_Get_COREPLL_DFS3_Frequency()1455 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[3U]); in Clock_Ip_Get_COREPLL_DFS3_Frequency()1463 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[4U])) in Clock_Ip_Get_COREPLL_DFS4_Frequency()1465 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[4U]); in Clock_Ip_Get_COREPLL_DFS4_Frequency()[all …]
167 Clock_Ip_apxDfs[Instance]->DVPORT[DividerIndex] = Value; in Clock_Ip_SetDfsMfiMfn()
81 …__IO uint32_t DVPORT[DFS_DVPORT_COUNT]; /**< Divider for Port 0..Divider for Port 5, arra… member
