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Searched refs:DMA1_TRIG12_PIO0_15 (Results 1 – 18 of 18) sorted by relevance

/hal_nxp-3.6.0/dts/nxp/lpc/
DLPC55S06JHI48-pinctrl.h828 #define DMA1_TRIG12_PIO0_15 IOCON_MUX(15, IOCON_TYPE_A, 0) /* PIO0_15 */ macro
DLPC55S16JBD64-pinctrl.h1005 #define DMA1_TRIG12_PIO0_15 IOCON_MUX(15, IOCON_TYPE_A, 0) /* PIO0_15 */ macro
DLPC55S28JBD64-pinctrl.h1010 #define DMA1_TRIG12_PIO0_15 IOCON_MUX(15, IOCON_TYPE_A, 0) /* PIO0_15 */ macro
DLPC55S69JBD64-pinctrl.h1010 #define DMA1_TRIG12_PIO0_15 IOCON_MUX(15, IOCON_TYPE_A, 0) /* PIO0_15 */ macro
DLPC55S06JBD64-pinctrl.h1005 #define DMA1_TRIG12_PIO0_15 IOCON_MUX(15, IOCON_TYPE_A, 0) /* PIO0_15 */ macro
DLPC55S16JEV98-pinctrl.h1005 #define DMA1_TRIG12_PIO0_15 IOCON_MUX(15, IOCON_TYPE_A, 0) /* PIO0_15 */ macro
DLPC55S28JBD100-pinctrl.h1010 #define DMA1_TRIG12_PIO0_15 IOCON_MUX(15, IOCON_TYPE_A, 0) /* PIO0_15 */ macro
DLPC55S28JEV98-pinctrl.h1010 #define DMA1_TRIG12_PIO0_15 IOCON_MUX(15, IOCON_TYPE_A, 0) /* PIO0_15 */ macro
DLPC55S69JEV98-pinctrl.h1010 #define DMA1_TRIG12_PIO0_15 IOCON_MUX(15, IOCON_TYPE_A, 0) /* PIO0_15 */ macro
DLPC55S36JHI48-pinctrl.h1888 #define DMA1_TRIG12_PIO0_15 IOCON_MUX(15, IOCON_TYPE_D, 0) /* PIO0_15 */ macro
DLPC55S69JBD100-pinctrl.h1010 #define DMA1_TRIG12_PIO0_15 IOCON_MUX(15, IOCON_TYPE_A, 0) /* PIO0_15 */ macro
DLPC55S16JBD100-pinctrl.h1005 #define DMA1_TRIG12_PIO0_15 IOCON_MUX(15, IOCON_TYPE_A, 0) /* PIO0_15 */ macro
DLPC55S36JBD100-pinctrl.h1983 #define DMA1_TRIG12_PIO0_15 IOCON_MUX(15, IOCON_TYPE_D, 0) /* PIO0_15 */ macro
/hal_nxp-3.6.0/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h1396 #define DMA1_TRIG12_PIO0_15 IOPCTL_MUX(15, 0) /* PIO0_15 */ macro
DMIMXRT595SFAWC-pinctrl.h1584 #define DMA1_TRIG12_PIO0_15 IOPCTL_MUX(15, 0) /* PIO0_15 */ macro
DMIMXRT685SFVKB-pinctrl.h1398 #define DMA1_TRIG12_PIO0_15 IOPCTL_MUX(15, 0) /* PIO0_15 */ macro
DMIMXRT595SFFOC-pinctrl.h1586 #define DMA1_TRIG12_PIO0_15 IOPCTL_MUX(15, 0) /* PIO0_15 */ macro
DMIMXRT685SFFOB-pinctrl.h1398 #define DMA1_TRIG12_PIO0_15 IOPCTL_MUX(15, 0) /* PIO0_15 */ macro