/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKL25Z4/ |
D | MKL25Z4.h | 664 #define CMP_SCR_CFF_SHIFT (1U) macro 665 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKL17Z644/ |
D | MKL17Z644.h | 878 #define CMP_SCR_CFF_SHIFT (1U) macro 883 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKL27Z644/ |
D | MKL27Z644.h | 887 #define CMP_SCR_CFF_SHIFT (1U) macro 892 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK02F12810/ |
D | MK02F12810.h | 946 #define CMP_SCR_CFF_SHIFT (1U) macro 951 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV30F12810/ |
D | MKV30F12810.h | 950 #define CMP_SCR_CFF_SHIFT (1U) macro 955 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV10Z7/ |
D | MKV10Z7.h | 864 #define CMP_SCR_CFF_SHIFT (1U) macro 869 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV10Z1287/ |
D | MKV10Z1287.h | 855 #define CMP_SCR_CFF_SHIFT (1U) macro 860 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV31F12810/ |
D | MKV31F12810.h | 963 #define CMP_SCR_CFF_SHIFT (1U) macro 968 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM14ZA5/ |
D | MKM14ZA5.h | 3228 #define CMP_SCR_CFF_SHIFT (1U) macro 3233 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV11Z7/ |
D | MKV11Z7.h | 1642 #define CMP_SCR_CFF_SHIFT (1U) macro 1647 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV31F25612/ |
D | MKV31F25612.h | 965 #define CMP_SCR_CFF_SHIFT (1U) macro 970 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV31F51212/ |
D | MKV31F51212.h | 965 #define CMP_SCR_CFF_SHIFT (1U) macro 970 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/K32L2B11A/ |
D | K32L2B11A.h | 910 #define CMP_SCR_CFF_SHIFT (1U) macro 915 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) & CMP_SCR_CFF_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/K32L2B31A/ |
D | K32L2B31A.h | 910 #define CMP_SCR_CFF_SHIFT (1U) macro 915 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) & CMP_SCR_CFF_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/K32L2B21A/ |
D | K32L2B21A.h | 910 #define CMP_SCR_CFF_SHIFT (1U) macro 915 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) & CMP_SCR_CFF_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK22F12810/ |
D | MK22F12810.h | 965 #define CMP_SCR_CFF_SHIFT (1U) macro 970 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK22F25612/ |
D | MK22F25612.h | 971 #define CMP_SCR_CFF_SHIFT (1U) macro 976 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK22F51212/ |
D | MK22F51212.h | 981 #define CMP_SCR_CFF_SHIFT (1U) macro 986 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKW22D5/ |
D | MKW22D5.h | 1212 #define CMP_SCR_CFF_SHIFT (1U) macro 1213 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKW24D5/ |
D | MKW24D5.h | 1212 #define CMP_SCR_CFF_SHIFT (1U) macro 1213 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/K32L2A31A/ |
D | K32L2A31A.h | 1939 #define CMP_SCR_CFF_SHIFT (1U) macro 1944 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) & CMP_SCR_CFF_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM33ZA5/ |
D | MKM33ZA5.h | 3230 #define CMP_SCR_CFF_SHIFT (1U) macro 3235 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/K32L2A41A/ |
D | K32L2A41A.h | 1939 #define CMP_SCR_CFF_SHIFT (1U) macro 1944 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) & CMP_SCR_CFF_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM34ZA5/ |
D | MKM34ZA5.h | 3226 #define CMP_SCR_CFF_SHIFT (1U) macro 3231 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK22F12/ |
D | MK22F12.h | 4787 #define CMP_SCR_CFF_SHIFT (1U) macro 4792 #define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) …
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