Home
last modified time | relevance | path

Searched refs:CLK_FRO_CLK (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT533S/
Dsystem_MIMXRT533S.h88 #define CLK_FRO_CLK (FRO_TUNER_USED ? FRO_FREQ_GET_FROM_TUNER : FRO_FREQ_GET_FROM_FUSE) macro
89 #define CLK_FRO_DIV2_CLK (CLK_FRO_CLK / 2u) /* FRO_DIV2 clock frequency */
90 #define CLK_FRO_DIV4_CLK (CLK_FRO_CLK / 4u) /* FRO_DIV4 clock frequency */
91 #define CLK_FRO_DIV8_CLK (CLK_FRO_CLK / 8u) /* FRO_DIV8 clock frequency */
92 #define CLK_FRO_DIV16_CLK (CLK_FRO_CLK / 16u) /* FRO_DIV16 clock frequency */
Dsystem_MIMXRT533S.c170 freq = CLK_FRO_CLK; in SystemCoreClockUpdate()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT555S/
Dsystem_MIMXRT555S.h88 #define CLK_FRO_CLK (FRO_TUNER_USED ? FRO_FREQ_GET_FROM_TUNER : FRO_FREQ_GET_FROM_FUSE) macro
89 #define CLK_FRO_DIV2_CLK (CLK_FRO_CLK / 2u) /* FRO_DIV2 clock frequency */
90 #define CLK_FRO_DIV4_CLK (CLK_FRO_CLK / 4u) /* FRO_DIV4 clock frequency */
91 #define CLK_FRO_DIV8_CLK (CLK_FRO_CLK / 8u) /* FRO_DIV8 clock frequency */
92 #define CLK_FRO_DIV16_CLK (CLK_FRO_CLK / 16u) /* FRO_DIV16 clock frequency */
Dsystem_MIMXRT555S.c170 freq = CLK_FRO_CLK; in SystemCoreClockUpdate()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT595S/
Dsystem_MIMXRT595S_cm33.h88 #define CLK_FRO_CLK (FRO_TUNER_USED ? FRO_FREQ_GET_FROM_TUNER : FRO_FREQ_GET_FROM_FUSE) macro
89 #define CLK_FRO_DIV2_CLK (CLK_FRO_CLK / 2u) /* FRO_DIV2 clock frequency */
90 #define CLK_FRO_DIV4_CLK (CLK_FRO_CLK / 4u) /* FRO_DIV4 clock frequency */
91 #define CLK_FRO_DIV8_CLK (CLK_FRO_CLK / 8u) /* FRO_DIV8 clock frequency */
92 #define CLK_FRO_DIV16_CLK (CLK_FRO_CLK / 16u) /* FRO_DIV16 clock frequency */
Dsystem_MIMXRT595S_dsp.h83 #define CLK_FRO_CLK (FRO_TUNER_USED ? FRO_FREQ_GET_FROM_TUNER : FRO_FREQ_GET_FROM_FUSE) /* FR… macro
84 #define CLK_FRO_DIV2_CLK (CLK_FRO_CLK / 2u) /* FRO_DIV2 clock frequency */
85 #define CLK_FRO_DIV4_CLK (CLK_FRO_CLK / 4u) /* FRO_DIV4 clock frequency */
86 #define CLK_FRO_DIV8_CLK (CLK_FRO_CLK / 8u) /* FRO_DIV8 clock frequency */
87 #define CLK_FRO_DIV16_CLK (CLK_FRO_CLK / 16u) /* FRO_DIV16 clock frequency */
Dsystem_MIMXRT595S_dsp.c112 freq = CLK_FRO_CLK; in SystemCoreClockUpdate()
Dsystem_MIMXRT595S_cm33.c171 freq = CLK_FRO_CLK; in SystemCoreClockUpdate()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_clock.c349 freq = CLK_FRO_CLK; in CLOCK_GetMainClkFreq()
387 freq = CLK_FRO_CLK; in CLOCK_GetDspMainClkFreq()
674 freq = CLK_FRO_CLK; in CLOCK_GetCtimerClkFreq()
735 freq = CLK_FRO_CLK; in CLOCK_GetFlexspiClkFreq()
773 freq = CLK_FRO_CLK; in CLOCK_GetSctClkFreq()
1068 freq = CLK_FRO_CLK; in CLOCK_GetGpuClkFreq()
1108 freq = CLK_FRO_CLK; in CLOCK_GetDcPixelClkFreq()
1141 freq = CLK_FRO_CLK; in CLOCK_GetMipiDphyClkFreq()
1173 freq = CLK_FRO_CLK; in CLOCK_GetMipiDphyEscRxClkFreq()
Dfsl_power.c123 #define US2LOOP(clk, x) ((clk) == kDeepSleepClk_LpOsc ? (x) / 4U : (x)*6U * (CLK_FRO_CLK / 96000000…
1001 SYSCTL0->MAINCLKSAFETY = POWER_CalculateSafetyCount(CLK_FRO_CLK / 4U / 1000000U); in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_clock.c349 freq = CLK_FRO_CLK; in CLOCK_GetMainClkFreq()
387 freq = CLK_FRO_CLK; in CLOCK_GetDspMainClkFreq()
674 freq = CLK_FRO_CLK; in CLOCK_GetCtimerClkFreq()
735 freq = CLK_FRO_CLK; in CLOCK_GetFlexspiClkFreq()
773 freq = CLK_FRO_CLK; in CLOCK_GetSctClkFreq()
1068 freq = CLK_FRO_CLK; in CLOCK_GetGpuClkFreq()
1108 freq = CLK_FRO_CLK; in CLOCK_GetDcPixelClkFreq()
1141 freq = CLK_FRO_CLK; in CLOCK_GetMipiDphyClkFreq()
1173 freq = CLK_FRO_CLK; in CLOCK_GetMipiDphyEscRxClkFreq()
Dfsl_power.c123 #define US2LOOP(clk, x) ((clk) == kDeepSleepClk_LpOsc ? (x) / 4U : (x)*6U * (CLK_FRO_CLK / 96000000…
1001 SYSCTL0->MAINCLKSAFETY = POWER_CalculateSafetyCount(CLK_FRO_CLK / 4U / 1000000U); in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_clock.c349 freq = CLK_FRO_CLK; in CLOCK_GetMainClkFreq()
387 freq = CLK_FRO_CLK; in CLOCK_GetDspMainClkFreq()
674 freq = CLK_FRO_CLK; in CLOCK_GetCtimerClkFreq()
735 freq = CLK_FRO_CLK; in CLOCK_GetFlexspiClkFreq()
773 freq = CLK_FRO_CLK; in CLOCK_GetSctClkFreq()
1068 freq = CLK_FRO_CLK; in CLOCK_GetGpuClkFreq()
1108 freq = CLK_FRO_CLK; in CLOCK_GetDcPixelClkFreq()
1141 freq = CLK_FRO_CLK; in CLOCK_GetMipiDphyClkFreq()
1173 freq = CLK_FRO_CLK; in CLOCK_GetMipiDphyEscRxClkFreq()
Dfsl_power.c123 #define US2LOOP(clk, x) ((clk) == kDeepSleepClk_LpOsc ? (x) / 4U : (x)*6U * (CLK_FRO_CLK / 96000000…
1001 SYSCTL0->MAINCLKSAFETY = POWER_CalculateSafetyCount(CLK_FRO_CLK / 4U / 1000000U); in AT_QUICKACCESS_SECTION_CODE()