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Searched refs:CHIPCTL (Results 1 – 23 of 23) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32k1/Mcu/src/
DClock_Ip_Selector.c705 RegValue = IP_SIM->CHIPCTL; in Clock_Ip_ResetSimClkoutSel_TrustedCall()
707 IP_SIM->CHIPCTL = RegValue; in Clock_Ip_ResetSimClkoutSel_TrustedCall()
714 RegValue = IP_SIM->CHIPCTL; in Clock_Ip_SetSimClkoutSel_TrustedCall()
717 IP_SIM->CHIPCTL = RegValue; in Clock_Ip_SetSimClkoutSel_TrustedCall()
754 RegValue = (uint32)IP_SIM->CHIPCTL; in Clock_Ip_ResetSimTraceSel_TrustedCall()
757 IP_SIM->CHIPCTL = (uint32)RegValue; in Clock_Ip_ResetSimTraceSel_TrustedCall()
765 RegValue = (uint32)IP_SIM->CHIPCTL; in Clock_Ip_SetSimTraceSel_TrustedCall()
768 IP_SIM->CHIPCTL = (uint32)RegValue; in Clock_Ip_SetSimTraceSel_TrustedCall()
DClock_Ip_Gate.c417 RegValue = IP_SIM->CHIPCTL; in Clock_Ip_ClockSetSimClkoutEnable_TrustedCall()
420 IP_SIM->CHIPCTL = RegValue; in Clock_Ip_ClockSetSimClkoutEnable_TrustedCall()
DClock_Ip_Divider.c614 RegValue = IP_SIM->CHIPCTL; in Clock_Ip_SetSimClkoutDiv_TrustedCall()
617 IP_SIM->CHIPCTL = RegValue; in Clock_Ip_SetSimClkoutDiv_TrustedCall()
DClock_Ip_Frequency.c960 …uint32 Frequency = FreqTableClkOut[((IP_SIM->CHIPCTL & SIM_CHIPCTL_CLKOUTSEL_MASK) >> SIM_CHIPCTL_… in get_CLKOUT0_CLK_Frequency()
961 …Frequency &= EnableDivider[((IP_SIM->CHIPCTL & SIM_CHIPCTL_CLKOUTEN_MASK) >> SIM_CHIPCTL_CLKOUTEN_… in get_CLKOUT0_CLK_Frequency()
962 …Frequency /= (((IP_SIM->CHIPCTL & SIM_CHIPCTL_CLKOUTDIV_MASK) >> SIM_CHIPCTL_CLKOUTDIV_SHIFT) + 1U… in get_CLKOUT0_CLK_Frequency()
/hal_nxp-3.6.0/s32/drivers/s32k1/BaseNXP/header/
DS32K116_SIM.h74 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member
DS32K118_SIM.h74 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member
DS32K142W_SIM.h74 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member
DS32K144_SIM.h74 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member
DS32K142_SIM.h74 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member
DS32K144W_SIM.h74 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member
DS32K146_SIM.h74 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member
DS32K148_SIM.h74 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h10380 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h10382 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h12956 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h11219 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h12959 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h12962 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h13163 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h13160 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h16305 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h17305 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h17311 __IO uint32_t CHIPCTL; /**< Chip Control register, offset: 0x4 */ member