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Searched refs:mem (Results 1 – 25 of 37) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/rdc/
Dfsl_rdc.h97 rdc_mem_t mem; /*!< Memory region descriptor name. */ member
354 static inline void RDC_LockMemAccessConfig(RDC_Type *base, rdc_mem_t mem) in RDC_LockMemAccessConfig() argument
356 assert((uint32_t)mem < RDC_MRC_COUNT); in RDC_LockMemAccessConfig()
358 base->MR[mem].MRC |= RDC_MRC_LCK_MASK; in RDC_LockMemAccessConfig()
369 static inline void RDC_SetMemAccessValid(RDC_Type *base, rdc_mem_t mem, bool valid) in RDC_SetMemAccessValid() argument
371 assert((uint32_t)mem < RDC_MRC_COUNT); in RDC_SetMemAccessValid()
375 base->MR[mem].MRC |= RDC_MRC_ENA_MASK; in RDC_SetMemAccessValid()
379 base->MR[mem].MRC &= ~RDC_MRC_ENA_MASK; in RDC_SetMemAccessValid()
396 void RDC_GetMemViolationStatus(RDC_Type *base, rdc_mem_t mem, rdc_mem_status_t *status);
404 static inline void RDC_ClearMemViolationFlag(RDC_Type *base, rdc_mem_t mem) in RDC_ClearMemViolationFlag() argument
[all …]
Dfsl_rdc.c230 assert((uint32_t)config->mem < RDC_MRC_COUNT); in RDC_SetMemAccessConfig()
232 uint32_t mem = (uint32_t)config->mem; in RDC_SetMemAccessConfig() local
242 …base->MR[mem].MRSA = (uint32_t)(config->baseAddress >> (uint32_t)FSL_FEATURE_RDC_MEM_REGION_ADDR_S… in RDC_SetMemAccessConfig()
243 …base->MR[mem].MREA = (uint32_t)(config->endAddress >> (uint32_t)FSL_FEATURE_RDC_MEM_REGION_ADDR_SH… in RDC_SetMemAccessConfig()
245 base->MR[mem].MRSA = (uint32_t)config->baseAddress; in RDC_SetMemAccessConfig()
246 base->MR[mem].MREA = (uint32_t)config->endAddress; in RDC_SetMemAccessConfig()
248 base->MR[mem].MRC = regMRC; in RDC_SetMemAccessConfig()
295 void RDC_GetMemViolationStatus(RDC_Type *base, rdc_mem_t mem, rdc_mem_status_t *status) in RDC_GetMemViolationStatus() argument
297 assert((uint32_t)mem < RDC_MRC_COUNT); in RDC_GetMemViolationStatus()
299 uint32_t regMRVS = base->MR[mem].MRVS; in RDC_GetMemViolationStatus()
/hal_nxp-3.5.0/mcux/mcux-sdk/CMSIS/RTOS2/RTX/Source/
Drtx_core_ca.h430 static __asm uint8_t atomic_wr8 (uint8_t *mem, uint8_t val) { in atomic_wr8() argument
440 __STATIC_INLINE uint8_t atomic_wr8 (uint8_t *mem, uint8_t val) { in atomic_wr8() argument
461 : [mem] "l" (mem), in atomic_wr8()
475 static __asm uint32_t atomic_set32 (uint32_t *mem, uint32_t bits) { in atomic_set32() argument
486 __STATIC_INLINE uint32_t atomic_set32 (uint32_t *mem, uint32_t bits) { in atomic_set32() argument
509 : [mem] "l" (mem), in atomic_set32()
523 static __asm uint32_t atomic_clr32 (uint32_t *mem, uint32_t bits) { in atomic_clr32() argument
535 __STATIC_INLINE uint32_t atomic_clr32 (uint32_t *mem, uint32_t bits) { in atomic_clr32() argument
558 : [mem] "l" (mem), in atomic_clr32()
572 static __asm uint32_t atomic_chk32_all (uint32_t *mem, uint32_t bits) { in atomic_chk32_all() argument
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Drtx_core_cm.h465 static __asm uint8_t atomic_wr8 (uint8_t *mem, uint8_t val) { in atomic_wr8() argument
476 __STATIC_INLINE uint8_t atomic_wr8 (uint8_t *mem, uint8_t val) { in atomic_wr8() argument
498 : [mem] "l" (mem), in atomic_wr8()
512 static __asm uint32_t atomic_set32 (uint32_t *mem, uint32_t bits) { in atomic_set32() argument
524 __STATIC_INLINE uint32_t atomic_set32 (uint32_t *mem, uint32_t bits) { in atomic_set32() argument
553 : [mem] "l" (mem), in atomic_set32()
571 static __asm uint32_t atomic_clr32 (uint32_t *mem, uint32_t bits) { in atomic_clr32() argument
584 __STATIC_INLINE uint32_t atomic_clr32 (uint32_t *mem, uint32_t bits) { in atomic_clr32() argument
613 : [mem] "l" (mem), in atomic_clr32()
631 static __asm uint32_t atomic_chk32_all (uint32_t *mem, uint32_t bits) { in atomic_chk32_all() argument
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Drtx_lib.h206 extern uint32_t osRtxMemoryInit (void *mem, uint32_t size);
207 extern void *osRtxMemoryAlloc(void *mem, uint32_t size, uint32_t type);
208 extern uint32_t osRtxMemoryFree (void *mem, void *block);
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/xrdc2/
Dfsl_xrdc2.c436 void XRDC2_SetMemAccessConfig(XRDC2_Type *base, xrdc2_mem_t mem, const xrdc2_mem_access_config_t *c… in XRDC2_SetMemAccessConfig() argument
446 uint32_t mrc = XRDC2_GET_MRC((uint32_t)mem); in XRDC2_SetMemAccessConfig()
447 uint32_t mrgd = XRDC2_GET_MRGD((uint32_t)mem); in XRDC2_SetMemAccessConfig()
469 void XRDC2_SetMemAccessValid(XRDC2_Type *base, xrdc2_mem_t mem, bool valid) in XRDC2_SetMemAccessValid() argument
471 uint32_t mrc = XRDC2_GET_MRC((uint32_t)mem); in XRDC2_SetMemAccessValid()
472 uint32_t mrgd = XRDC2_GET_MRGD((uint32_t)mem); in XRDC2_SetMemAccessValid()
492 void XRDC2_SetMemAccessLockMode(XRDC2_Type *base, xrdc2_mem_t mem, xrdc2_access_config_lock_t lockM… in XRDC2_SetMemAccessLockMode() argument
494 uint32_t mrc = XRDC2_GET_MRC((uint32_t)mem); in XRDC2_SetMemAccessLockMode()
495 uint32_t mrgd = XRDC2_GET_MRGD((uint32_t)mem); in XRDC2_SetMemAccessLockMode()
509 void XRDC2_SetMemDomainAccessPolicy(XRDC2_Type *base, xrdc2_mem_t mem, uint8_t domainId, xrdc2_acce… in XRDC2_SetMemDomainAccessPolicy() argument
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Dfsl_xrdc2.h467 void XRDC2_SetMemAccessConfig(XRDC2_Type *base, xrdc2_mem_t mem, const xrdc2_mem_access_config_t *c…
476 void XRDC2_SetMemAccessValid(XRDC2_Type *base, xrdc2_mem_t mem, bool valid);
485 void XRDC2_SetMemAccessLockMode(XRDC2_Type *base, xrdc2_mem_t mem, xrdc2_access_config_lock_t lockM…
495 void XRDC2_SetMemDomainAccessPolicy(XRDC2_Type *base, xrdc2_mem_t mem, uint8_t domainId, xrdc2_acce…
506 void XRDC2_EnableMemExclAccessLock(XRDC2_Type *base, xrdc2_mem_t mem, bool enable);
515 uint8_t XRDC2_GetMemExclAccessLockDomainOwner(XRDC2_Type *base, xrdc2_mem_t mem);
525 status_t XRDC2_TryLockMemExclAccess(XRDC2_Type *base, xrdc2_mem_t mem);
535 void XRDC2_LockMemExclAccess(XRDC2_Type *base, xrdc2_mem_t mem);
545 void XRDC2_UnlockMemExclAccess(XRDC2_Type *base, xrdc2_mem_t mem);
555 void XRDC2_ForceMemExclAccessLockRelease(XRDC2_Type *base, xrdc2_mem_t mem);
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX9352/iar/
DMIMX9352_cm33_ram.icf65 define memory mem with size = 4G;
66 define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
67 | mem:[from m_text_start to m_text_end];
68 define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__];
69 define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end];
70 define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
71 define region M33_SUSPEND_region = mem:[from m_m33_suspend_ram_start to m_m33_suspend_ram_end];
72 define region A55_SUSPEND_region = mem:[from m_a55_suspend_ram_start to m_a55_suspend_ram_end];
84 place at address mem: m_interrupts_start { readonly section .intvec };
85 ".resource_table": place at address mem: m_text_start {section .resource_table};
DMIMX9352_cm33_flash.icf70 define memory mem with size = 4G;
71 define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
72 | mem:[from m_text_start to m_text_end];
73 define region DATA_region = mem:[from m_data_start to m_data_end]
74 | mem:[from m_data_2_start to m_data_2_end-__size_cstack__];
75 define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data_2_end];
76 define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
77 define region M33_SUSPEND_region = mem:[from m_m33_suspend_ram_start to m_m33_suspend_ram_end];
78 define region A55_SUSPEND_region = mem:[from m_a55_suspend_ram_start to m_a55_suspend_ram_end];
92 place at address mem: m_interrupts_start { readonly section .intvec };
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/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/xrdc/
Dfsl_xrdc.h329 xrdc_mem_t mem; /*!< Memory region descriptor name. */ member
877 static inline void XRDC_SetMemAccessLockMode(XRDC_Type *base, xrdc_mem_t mem, xrdc_access_config_lo… in XRDC_SetMemAccessLockMode() argument
880 uint32_t reg = base->MRGD[mem].MRGD_W[3]; in XRDC_SetMemAccessLockMode()
884 base->MRGD[mem].MRGD_W[3] = reg; in XRDC_SetMemAccessLockMode()
886 uint32_t reg = base->MRGD[mem].MRGD_W[4]; in XRDC_SetMemAccessLockMode()
890 base->MRGD[mem].MRGD_W[4] = reg; in XRDC_SetMemAccessLockMode()
918 static inline void XRDC_SetMemAccessValid(XRDC_Type *base, xrdc_mem_t mem, bool valid) in XRDC_SetMemAccessValid() argument
923 base->MRGD[mem].MRGD_W[3] |= XRDC_MRGD_W_VLD_MASK; in XRDC_SetMemAccessValid()
927 base->MRGD[mem].MRGD_W[3] &= ~XRDC_MRGD_W_VLD_MASK; in XRDC_SetMemAccessValid()
932 base->MRGD[mem].MRGD_W[4] |= XRDC_MRGD_W_VLD_MASK; in XRDC_SetMemAccessValid()
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Dfsl_xrdc.c577 uint8_t index = (uint8_t)config->mem; in XRDC_SetMemAccessConfig()
672 void XRDC_SetMemExclAccessLockMode(XRDC_Type *base, xrdc_mem_t mem, xrdc_excl_access_lock_config_t … in XRDC_SetMemExclAccessLockMode() argument
677 uint32_t reg = base->MRGD[mem].MRGD_W[4]; in XRDC_SetMemExclAccessLockMode()
680 base->MRGD[mem].MRGD_W[3] = XRDC_MRGD_W_EAL(lockMode); in XRDC_SetMemExclAccessLockMode()
683 base->MRGD[mem].MRGD_W[4] = reg; in XRDC_SetMemExclAccessLockMode()
700 void XRDC_ForceMemExclAccessLockRelease(XRDC_Type *base, xrdc_mem_t mem) in XRDC_ForceMemExclAccessLockRelease() argument
705 base->MRGD[mem].MRGD_W[3] = XRDC_FORCE_EXCL_ACS_LOCK_REL_VAL1; in XRDC_ForceMemExclAccessLockRelease()
706 base->MRGD[mem].MRGD_W[3] = XRDC_FORCE_EXCL_ACS_LOCK_REL_VAL2; in XRDC_ForceMemExclAccessLockRelease()
720 void XRDC_SetMemAccsetLock(XRDC_Type *base, xrdc_mem_t mem, xrdc_mem_accset_t accset, bool lock) in XRDC_SetMemAccsetLock() argument
735 base->MRGD[mem].MRGD_W[4] |= lkasMask; in XRDC_SetMemAccsetLock()
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/hal_nxp-3.5.0/mcux/mcux-sdk/components/video/
Dfsl_video_common.c241 void VIDEO_MEMPOOL_Put(video_mempool_t *mempool, void *mem) in VIDEO_MEMPOOL_Put() argument
243 *(void **)mem = mempool->pool; in VIDEO_MEMPOOL_Put()
244 mempool->pool = mem; in VIDEO_MEMPOOL_Put()
250 void *mem = mempool->pool; in VIDEO_MEMPOOL_Get() local
252 if (NULL != mem) in VIDEO_MEMPOOL_Get()
255 mempool->pool = *(void **)mem; in VIDEO_MEMPOOL_Get()
258 return mem; in VIDEO_MEMPOOL_Get()
Dfsl_video_common.h280 void VIDEO_MEMPOOL_Put(video_mempool_t *mempool, void *mem);
/hal_nxp-3.5.0/mcux/mcux-sdk/CMSIS/RTOS2/RTX/Include/
Drtx_evr.h109 extern void EvrRtxMemoryInit (void *mem, uint32_t size, uint32_t result);
111 #define EvrRtxMemoryInit(mem, size, result) argument
122 extern void EvrRtxMemoryAlloc (void *mem, uint32_t size, uint32_t type, void *block);
124 #define EvrRtxMemoryAlloc(mem, size, type, block) argument
134 extern void EvrRtxMemoryFree (void *mem, void *block, uint32_t result);
136 #define EvrRtxMemoryFree(mem, block, result) argument
Drtx_os.h331 } mem; member
447 } mem; member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/xtensa/gdbio/
Dmemmap.xmm28 // <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/xtensa/min-rt/
Dmemmap.xmm28 // <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/xtensa/sim/
Dmemmap.xmm28 // <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/xtensa/gdbio/
Dmemmap.xmm32 // <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/xtensa/min-rt/
Dmemmap.xmm30 // <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/xtensa/sim/
Dmemmap.xmm30 // <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/xtensa_lowmem/min-rt/
Dmemmap.xmm30 // <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/xtensa_lowmem/sim/
Dmemmap.xmm30 // <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/xtensa_lowmem/gdbio/
Dmemmap.xmm35 // <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
/hal_nxp-3.5.0/mcux/mcux-sdk/components/codec/tfa9896/
Dfsl_hal_registers.c198 unsigned char mem[3]; /* will be filled with the status read from DSP memory */ in checkRpcStatus() local
228 error = TFA9896_ReadData(handle, 0x72, 3 /*sizeof(mem) */, mem); in checkRpcStatus()
232 *pRpcStatus = (mem[0] << 16) | (mem[1] << 8) | mem[2]; in checkRpcStatus()

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